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Searched refs:DestSub0 (Results 1 – 3 of 3) sorted by relevance

/openbsd-src/gnu/llvm/llvm/lib/Target/AMDGPU/
H A DSIInstrInfo.cpp6861 Register DestSub0 = MRI.createVirtualRegister(NewDestSubRC); in splitScalar64BitUnaryOp() local
6862 MachineInstr &LoHalf = *BuildMI(MBB, MII, DL, InstDesc, DestSub0).add(SrcReg0Sub0); in splitScalar64BitUnaryOp()
6871 std::swap(DestSub0, DestSub1); in splitScalar64BitUnaryOp()
6875 .addReg(DestSub0) in splitScalar64BitUnaryOp()
6902 Register DestSub0 = MRI.createVirtualRegister(&AMDGPU::VGPR_32RegClass); in splitScalar64BitAddSub() local
6934 BuildMI(MBB, MII, DL, get(LoOpc), DestSub0) in splitScalar64BitAddSub()
6950 .addReg(DestSub0) in splitScalar64BitAddSub()
7007 Register DestSub0 = MRI.createVirtualRegister(NewDestSubRC); in splitScalar64BitBinaryOp() local
7008 MachineInstr &LoHalf = *BuildMI(MBB, MII, DL, InstDesc, DestSub0) in splitScalar64BitBinaryOp()
7019 .addReg(DestSub0) in splitScalar64BitBinaryOp()
H A DSILoadStoreOptimizer.cpp1943 Register DestSub0 = MRI->createVirtualRegister(&AMDGPU::VGPR_32RegClass); in computeBase() local
1946 BuildMI(*MBB, MBBI, DL, TII->get(AMDGPU::V_ADD_CO_U32_e64), DestSub0) in computeBase()
1967 .addReg(DestSub0) in computeBase()
H A DSIISelLowering.cpp4043 Register DestSub0 = MRI.createVirtualRegister(&AMDGPU::SReg_32RegClass); in EmitInstrWithCustomInserter() local
4060 BuildMI(*BB, MI, DL, TII->get(LoOpc), DestSub0).add(Src0Sub0).add(Src1Sub0); in EmitInstrWithCustomInserter()
4063 .addReg(DestSub0) in EmitInstrWithCustomInserter()
4096 Register DestSub0 = MRI.createVirtualRegister(&AMDGPU::VGPR_32RegClass); in EmitInstrWithCustomInserter() local
4125 MachineInstr *LoHalf = BuildMI(*BB, MI, DL, TII->get(LoOpc), DestSub0) in EmitInstrWithCustomInserter()
4141 .addReg(DestSub0) in EmitInstrWithCustomInserter()