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Searched refs:DemandedElts (Results 1 – 25 of 58) sorted by relevance

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/openbsd-src/gnu/llvm/llvm/lib/CodeGen/GlobalISel/
H A DGISelKnownBits.cpp63 APInt DemandedElts = in getKnownBits() local
65 return getKnownBits(R, DemandedElts); in getKnownBits()
68 KnownBits GISelKnownBits::getKnownBits(Register R, const APInt &DemandedElts, in getKnownBits() argument
74 computeKnownBitsImpl(R, Known, DemandedElts); in getKnownBits()
105 const APInt &DemandedElts, in computeKnownBitsMin() argument
108 computeKnownBitsImpl(Src1, Known, DemandedElts, Depth); in computeKnownBitsMin()
115 computeKnownBitsImpl(Src0, Known2, DemandedElts, Depth); in computeKnownBitsMin()
136 const APInt &DemandedElts, in computeKnownBitsImpl() argument
173 if (!DemandedElts) in computeKnownBitsImpl()
180 TL.computeKnownBitsForTargetInstr(*this, R, Known, DemandedElts, MRI, in computeKnownBitsImpl()
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/openbsd-src/gnu/llvm/llvm/include/llvm/CodeGen/GlobalISel/
H A DGISelKnownBits.h39 const APInt &DemandedElts,
43 const APInt &DemandedElts, unsigned Depth = 0);
58 const APInt &DemandedElts,
61 unsigned computeNumSignBits(Register R, const APInt &DemandedElts,
67 KnownBits getKnownBits(Register R, const APInt &DemandedElts,
/openbsd-src/gnu/llvm/llvm/lib/CodeGen/SelectionDAG/
H A DSelectionDAG.cpp2543 const APInt &DemandedElts, in MaskedValueIsZero() argument
2545 return Mask.isSubsetOf(computeKnownBits(V, DemandedElts, Depth).Zero); in MaskedValueIsZero()
2550 bool SelectionDAG::MaskedVectorIsZero(SDValue V, const APInt &DemandedElts, in MaskedVectorIsZero() argument
2552 return computeKnownBits(V, DemandedElts, Depth).isZero(); in MaskedVectorIsZero()
2562 const APInt &DemandedElts, in computeVectorKnownZeroElements() argument
2568 assert(DemandedElts.getBitWidth() == NumElts && "Unexpected demanded mask."); in computeVectorKnownZeroElements()
2572 if (!DemandedElts[EltIdx]) in computeVectorKnownZeroElements()
2586 bool SelectionDAG::isSplatValue(SDValue V, const APInt &DemandedElts, in isSplatValue() argument
2591 assert((!VT.isScalableVector() || DemandedElts.getBitWidth() == 1) && in isSplatValue()
2594 if (!DemandedElts) in isSplatValue()
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H A DTargetLowering.cpp502 const APInt &DemandedElts, in ShrinkDemandedConstant() argument
508 if (targetShrinkDemandedConstant(Op, DemandedBits, DemandedElts, TLO)) in ShrinkDemandedConstant()
545 APInt DemandedElts = VT.isVector() in ShrinkDemandedConstant() local
548 return ShrinkDemandedConstant(Op, DemandedBits, DemandedElts, TLO); in ShrinkDemandedConstant()
614 const APInt &DemandedElts, in SimplifyDemandedBits() argument
622 SimplifyDemandedBits(Op, DemandedBits, DemandedElts, Known, TLO); in SimplifyDemandedBits()
640 APInt DemandedElts = VT.isFixedLengthVector() in SimplifyDemandedBits() local
643 return SimplifyDemandedBits(Op, DemandedBits, DemandedElts, Known, TLO, Depth, in SimplifyDemandedBits()
649 SDValue Op, const APInt &DemandedBits, const APInt &DemandedElts, in SimplifyMultipleUseDemandedBits() argument
662 if (DemandedBits == 0 || DemandedElts == 0) in SimplifyMultipleUseDemandedBits()
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/openbsd-src/gnu/llvm/llvm/lib/Target/X86/
H A DX86InstCombineIntrinsic.cpp933 APInt DemandedElts = APInt::getLowBitsSet(Width, DemandedWidth); in instCombineIntrinsic() local
934 return IC.SimplifyDemandedVectorElts(Op, DemandedElts, UndefElts); in instCombineIntrinsic()
1762 APInt DemandedElts = DemandedMask.zextOrTrunc(ArgWidth); in simplifyDemandedUseBitsIntrinsic() local
1764 if (DemandedElts.isZero()) { in simplifyDemandedUseBitsIntrinsic()
1778 InstCombiner &IC, IntrinsicInst &II, APInt DemandedElts, APInt &UndefElts, in simplifyDemandedVectorEltsIntrinsic() argument
1792 if (!DemandedElts[0]) { in simplifyDemandedVectorEltsIntrinsic()
1798 DemandedElts = 1; in simplifyDemandedVectorEltsIntrinsic()
1799 simplifyAndSetOp(&II, 0, DemandedElts, UndefElts); in simplifyDemandedVectorEltsIntrinsic()
1808 simplifyAndSetOp(&II, 0, DemandedElts, UndefElts); in simplifyDemandedVectorEltsIntrinsic()
1811 if (!DemandedElts[0]) { in simplifyDemandedVectorEltsIntrinsic()
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H A DX86ISelLowering.h1171 const APInt &DemandedElts,
1178 const APInt &DemandedElts,
1184 const APInt &DemandedElts,
1189 const APInt &DemandedElts,
1196 const APInt &DemandedElts,
1203 const APInt &DemandedElts,
1209 SDValue Op, const APInt &DemandedBits, const APInt &DemandedElts,
1213 SDValue Op, const APInt &DemandedElts, const SelectionDAG &DAG,
1217 SDValue Op, const APInt &DemandedElts, const SelectionDAG &DAG,
1220 bool isSplatValueForTargetNode(SDValue Op, const APInt &DemandedElts,
H A DX86TargetTransformInfo.h155 const APInt &DemandedElts,
185 InstCombiner &IC, IntrinsicInst &II, APInt DemandedElts, APInt &UndefElts,
/openbsd-src/gnu/llvm/llvm/lib/Transforms/InstCombine/
H A DInstCombineSimplifyDemanded.cpp1236 APInt DemandedElts, in SimplifyDemandedVectorElts() argument
1247 assert((DemandedElts & ~EltMask) == 0 && "Invalid DemandedElts!"); in SimplifyDemandedVectorElts()
1255 if (DemandedElts.isZero()) { // If nothing is demanded, provide poison. in SimplifyDemandedVectorElts()
1265 if (DemandedElts.isAllOnes()) in SimplifyDemandedVectorElts()
1272 if (!DemandedElts[i]) { // If not demanded, set to poison. in SimplifyDemandedVectorElts()
1308 DemandedElts = EltMask; in SimplifyDemandedVectorElts()
1358 simplifyAndSetOp(I, i, DemandedElts, UndefEltsOp); in SimplifyDemandedVectorElts()
1376 simplifyAndSetOp(I, 0, DemandedElts, UndefElts2); in SimplifyDemandedVectorElts()
1383 APInt PreInsertDemandedElts = DemandedElts; in SimplifyDemandedVectorElts()
1404 if (IdxNo >= VWidth || !DemandedElts[IdxNo]) { in SimplifyDemandedVectorElts()
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/openbsd-src/gnu/llvm/llvm/lib/Analysis/
H A DValueTracking.cpp158 const APInt &DemandedElts, in getShuffleDemandedElts() argument
161 assert(DemandedElts == APInt(1,1)); in getShuffleDemandedElts()
162 DemandedLHS = DemandedRHS = DemandedElts; in getShuffleDemandedElts()
169 DemandedElts, DemandedLHS, DemandedRHS); in getShuffleDemandedElts()
172 static void computeKnownBits(const Value *V, const APInt &DemandedElts,
181 APInt DemandedElts = in computeKnownBits() local
183 computeKnownBits(V, DemandedElts, Known, Depth, Q); in computeKnownBits()
195 void llvm::computeKnownBits(const Value *V, const APInt &DemandedElts, in computeKnownBits() argument
200 ::computeKnownBits(V, DemandedElts, Known, Depth, in computeKnownBits()
204 static KnownBits computeKnownBits(const Value *V, const APInt &DemandedElts,
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H A DVectorUtils.cpp433 const APInt &DemandedElts, APInt &DemandedLHS, in getShuffleDemandedElts() argument
438 if (DemandedElts.isZero()) in getShuffleDemandedElts()
452 if (!DemandedElts[I] || (AllowUndefElts && (M < 0))) in getShuffleDemandedElts()
1131 APInt DemandedElts = APInt::getAllOnes(VWidth); in possiblyDemandedEltsInMask() local
1135 DemandedElts.clearBit(i); in possiblyDemandedEltsInMask()
1136 return DemandedElts; in possiblyDemandedEltsInMask()
H A DTargetTransformInfo.cpp326 InstCombiner &IC, IntrinsicInst &II, APInt DemandedElts, APInt &UndefElts, in simplifyDemandedVectorEltsIntrinsic() argument
331 IC, II, DemandedElts, UndefElts, UndefElts2, UndefElts3, in simplifyDemandedVectorEltsIntrinsic()
517 VectorType *Ty, const APInt &DemandedElts, bool Insert, bool Extract, in getScalarizationOverhead() argument
519 return TTIImpl->getScalarizationOverhead(Ty, DemandedElts, Insert, Extract, in getScalarizationOverhead()
/openbsd-src/gnu/llvm/llvm/lib/Target/AMDGPU/
H A DAMDGPUInstCombineIntrinsic.cpp1072 APInt DemandedElts, in simplifyAMDGCNMemoryIntrinsicDemanded() argument
1090 const unsigned ActiveBits = DemandedElts.getActiveBits(); in simplifyAMDGCNMemoryIntrinsicDemanded()
1091 const unsigned UnusedComponentsAtFront = DemandedElts.countTrailingZeros(); in simplifyAMDGCNMemoryIntrinsicDemanded()
1096 DemandedElts = (1 << ActiveBits) - 1; in simplifyAMDGCNMemoryIntrinsicDemanded()
1126 DemandedElts &= ~((1 << UnusedComponentsAtFront) - 1); in simplifyAMDGCNMemoryIntrinsicDemanded()
1143 DemandedElts &= (1 << llvm::popcount(DMaskVal)) - 1; in simplifyAMDGCNMemoryIntrinsicDemanded()
1150 if (!!DemandedElts[OrigLoadIdx]) in simplifyAMDGCNMemoryIntrinsicDemanded()
1160 unsigned NewNumElts = DemandedElts.countPopulation(); in simplifyAMDGCNMemoryIntrinsicDemanded()
1164 if (NewNumElts >= VWidth && DemandedElts.isMask()) { in simplifyAMDGCNMemoryIntrinsicDemanded()
1188 DemandedElts.countTrailingZeros()); in simplifyAMDGCNMemoryIntrinsicDemanded()
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H A DAMDGPUISelLowering.h265 const APInt &DemandedElts,
269 unsigned ComputeNumSignBitsForTargetNode(SDValue Op, const APInt &DemandedElts,
275 const APInt &DemandedElts,
H A DAMDGPUTargetTransformInfo.h196 InstCombiner &IC, IntrinsicInst &II, APInt DemandedElts, APInt &UndefElts,
/openbsd-src/gnu/llvm/llvm/include/llvm/CodeGen/
H A DTargetLowering.h3685 const APInt &DemandedElts,
3697 const APInt &DemandedElts, in targetShrinkDemandedConstant() argument
3722 const APInt &DemandedElts, KnownBits &Known,
3741 const APInt &DemandedElts,
3748 const APInt &DemandedElts,
3761 const APInt &DemandedElts,
3786 bool SimplifyDemandedVectorElts(SDValue Op, const APInt &DemandedElts,
3803 const APInt &DemandedElts,
3813 const APInt &DemandedElts,
3838 const APInt &DemandedElts,
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H A DSelectionDAG.h1946 const APInt &DemandedElts, unsigned Depth = 0) const;
1950 bool MaskedVectorIsZero(SDValue Op, const APInt &DemandedElts,
1959 APInt computeVectorKnownZeroElements(SDValue Op, const APInt &DemandedElts,
1974 KnownBits computeKnownBits(SDValue Op, const APInt &DemandedElts,
2012 unsigned ComputeNumSignBits(SDValue Op, const APInt &DemandedElts,
2025 unsigned ComputeMaxSignificantBits(SDValue Op, const APInt &DemandedElts,
2036 bool isGuaranteedNotToBeUndefOrPoison(SDValue Op, const APInt &DemandedElts,
2047 bool isGuaranteedNotToBePoison(SDValue Op, const APInt &DemandedElts,
2049 return isGuaranteedNotToBeUndefOrPoison(Op, DemandedElts,
2062 bool canCreateUndefOrPoison(SDValue Op, const APInt &DemandedElts,
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/openbsd-src/gnu/llvm/llvm/lib/Target/RISCV/
H A DRISCVISelLowering.h425 const APInt &DemandedElts,
430 const APInt &DemandedElts,
434 const APInt &DemandedElts,
/openbsd-src/gnu/llvm/llvm/lib/Target/Hexagon/
H A DHexagonTargetTransformInfo.cpp142 VectorType *Ty, const APInt &DemandedElts, bool Insert, bool Extract, in getScalarizationOverhead() argument
144 return BaseT::getScalarizationOverhead(Ty, DemandedElts, Insert, Extract, in getScalarizationOverhead()
H A DHexagonTargetTransformInfo.h109 const APInt &DemandedElts,
/openbsd-src/gnu/llvm/llvm/include/llvm/Analysis/
H A DTargetTransformInfo.h567 InstCombiner & IC, IntrinsicInst & II, APInt DemandedElts,
754 const APInt &DemandedElts,
1626 InstCombiner &IC, IntrinsicInst &II, APInt DemandedElts,
1682 const APInt &DemandedElts,
2034 InstCombiner &IC, IntrinsicInst &II, APInt DemandedElts, APInt &UndefElts, in simplifyDemandedVectorEltsIntrinsic() argument
2039 IC, II, DemandedElts, UndefElts, UndefElts2, UndefElts3, in simplifyDemandedVectorEltsIntrinsic()
2160 const APInt &DemandedElts, in getScalarizationOverhead() argument
2163 return Impl.getScalarizationOverhead(Ty, DemandedElts, Insert, Extract, in getScalarizationOverhead()
H A DValueTracking.h71 void computeKnownBits(const Value *V, const APInt &DemandedElts,
88 KnownBits computeKnownBits(const Value *V, const APInt &DemandedElts,
/openbsd-src/gnu/llvm/llvm/include/llvm/Transforms/InstCombine/
H A DInstCombiner.h388 IntrinsicInst &II, APInt DemandedElts, APInt &UndefElts,
529 SimplifyDemandedVectorElts(Value *V, APInt DemandedElts, APInt &UndefElts,
/openbsd-src/gnu/llvm/llvm/lib/Target/Lanai/
H A DLanaiISelLowering.h113 const APInt &DemandedElts,
/openbsd-src/gnu/llvm/llvm/lib/Target/XCore/
H A DXCoreISelLowering.h203 const APInt &DemandedElts,
/openbsd-src/gnu/llvm/llvm/lib/Target/WebAssembly/
H A DWebAssemblyISelLowering.h86 const APInt &DemandedElts,

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