| /openbsd-src/gnu/llvm/llvm/lib/CodeGen/ |
| H A D | DetectDeadLanes.cpp | 247 Register DefReg = Def.getReg(); in transferUsedLanes() local 248 const TargetRegisterClass *RC = MRI->getRegClass(DefReg); in transferUsedLanes() 282 Register DefReg = Def.getReg(); in transferDefinedLanesStep() local 283 if (!DefReg.isVirtual()) in transferDefinedLanesStep() 285 unsigned DefRegIdx = Register::virtReg2Index(DefReg); in transferDefinedLanesStep() 425 Register DefReg = Def.getReg(); in determineInitialUsedLanes() local 428 if (DefReg.isVirtual()) { in determineInitialUsedLanes() 432 const TargetRegisterClass *DstRC = MRI->getRegClass(DefReg); in determineInitialUsedLanes() 467 Register DefReg = Def.getReg(); in isUndefInput() local 468 if (!DefReg.isVirtual()) in isUndefInput() [all …]
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| H A D | TailDuplicator.cpp | 352 Register DefReg = MI->getOperand(0).getReg(); in processPHI() local 357 const TargetRegisterClass *RC = MRI->getRegClass(DefReg); in processPHI() 358 LocalVRMap.insert(std::make_pair(DefReg, RegSubRegPair(SrcReg, SrcSubReg))); in processPHI() 364 if (isDefLiveOut(DefReg, TailBB, MRI) || RegsUsedByPhi.count(DefReg)) in processPHI() 365 addSSAUpdateEntry(DefReg, NewDef, PredBB); in processPHI()
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| H A D | ImplicitNullChecks.cpp | 716 unsigned DefReg = NoRegister; in insertFaultingInstr() local 718 DefReg = MI->getOperand(0).getReg(); in insertFaultingInstr() 729 auto MIB = BuildMI(MBB, DL, TII->get(TargetOpcode::FAULTING_OP), DefReg) in insertFaultingInstr()
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| H A D | LiveVariables.cpp | 215 Register DefReg = MO.getReg(); in FindLastPartialDef() local 216 if (TRI->isSubRegister(Reg, DefReg)) { in FindLastPartialDef() 217 for (MCSubRegIterator SubRegs(DefReg, TRI, /*IncludeSelf=*/true); in FindLastPartialDef()
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| H A D | MachineCopyPropagation.cpp | 935 Register DefReg = CopyOperands->Destination->getReg(); in BackwardCopyPropagateBlock() local 938 if (!TRI->regsOverlap(DefReg, SrcReg)) { in BackwardCopyPropagateBlock() 939 MCRegister Def = DefReg.asMCReg(); in BackwardCopyPropagateBlock()
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| H A D | PHIElimination.cpp | 202 Register DefReg = DefMI->getOperand(0).getReg(); in runOnMachineFunction() local 203 if (MRI->use_nodbg_empty(DefReg)) { in runOnMachineFunction()
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| H A D | TargetInstrInfo.cpp | 1060 Register DefReg = MI.getOperand(0).getReg(); in isReallyTriviallyReMaterializableGeneric() local 1066 if (DefReg.isVirtual() && MI.getOperand(0).getSubReg() && in isReallyTriviallyReMaterializableGeneric() 1067 MI.readsVirtualRegister(DefReg)) in isReallyTriviallyReMaterializableGeneric() 1117 if (MO.isDef() && Reg != DefReg) in isReallyTriviallyReMaterializableGeneric()
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| /openbsd-src/gnu/llvm/llvm/include/llvm/CodeGen/GlobalISel/ |
| H A D | LegalizationArtifactCombiner.h | 413 Register DefReg = MI.getOperand(I).getReg(); in tryFoldUnmergeCast() local 414 UpdatedDefs.push_back(DefReg); in tryFoldUnmergeCast() 415 Builder.buildTrunc(DefReg, NewUnmerge.getReg(I)); in tryFoldUnmergeCast() 725 Register findValueFromDefImpl(Register DefReg, unsigned StartBit, in findValueFromDefImpl() argument 728 getDefSrcRegIgnoringCopies(DefReg, MRI); in findValueFromDefImpl() 730 DefReg = DefSrcReg->Reg; in findValueFromDefImpl() 739 unsigned DefSize = MRI.getType(DefReg).getSizeInBits(); in findValueFromDefImpl() 741 if (MO.getReg() == DefReg) in findValueFromDefImpl() 754 return DefReg; in findValueFromDefImpl() 776 Register findValueFromDef(Register DefReg, unsigned StartBit, in findValueFromDef() argument [all …]
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| /openbsd-src/gnu/llvm/llvm/lib/Target/WebAssembly/ |
| H A D | WebAssemblyRegStackify.cpp | 473 Register DefReg = MO.getReg(); in oneUseDominatesOtherUses() local 474 if (!DefReg.isVirtual() || !MFI.isVRegStackified(DefReg)) in oneUseDominatesOtherUses() 476 assert(MRI.hasOneNonDBGUse(DefReg)); in oneUseDominatesOtherUses() 477 const MachineOperand &NewUse = *MRI.use_nodbg_begin(DefReg); in oneUseDominatesOtherUses() 648 Register DefReg = MRI.createVirtualRegister(RegClass); in moveAndTeeForMultiUse() local 653 .addReg(DefReg, getUndefRegState(DefMO.isDead())); in moveAndTeeForMultiUse() 655 DefMO.setReg(DefReg); in moveAndTeeForMultiUse() 671 LIS.createAndComputeVirtRegInterval(DefReg); in moveAndTeeForMultiUse() 672 MFI.stackifyVReg(MRI, DefReg); in moveAndTeeForMultiUse() 677 DefDIs.clone(Tee, DefReg); in moveAndTeeForMultiUse() [all …]
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| H A D | WebAssemblyCFGStackify.cpp | 831 Register DefReg = MI.getOperand(2).getReg(); in unstackifyVRegsUsedInSplitBB() local 834 MFI.unstackifyVReg(DefReg); in unstackifyVRegsUsedInSplitBB() 836 WebAssembly::getCopyOpcodeForRegClass(MRI.getRegClass(DefReg)); in unstackifyVRegsUsedInSplitBB() 838 .addReg(DefReg); in unstackifyVRegsUsedInSplitBB() 839 BuildMI(MBB, &MI, MI.getDebugLoc(), TII.get(CopyOpc), Reg).addReg(DefReg); in unstackifyVRegsUsedInSplitBB()
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| H A D | WebAssemblyExplicitLocals.cpp | 192 for (auto DefReg : Def->defs()) { in findStartOfTree() local 193 if (!MFI.isVRegStackified(DefReg.getReg())) { in findStartOfTree()
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| /openbsd-src/gnu/llvm/llvm/lib/Target/RISCV/ |
| H A D | RISCVRedundantCopyElimination.cpp | 120 Register DefReg = MI->getOperand(0).getReg(); in optimizeBlock() local 123 if (SrcReg == RISCV::X0 && !MRI->isReserved(DefReg) && in optimizeBlock() 124 TargetReg == DefReg) { in optimizeBlock()
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| /openbsd-src/gnu/llvm/llvm/lib/Target/AArch64/ |
| H A D | AArch64RedundantCopyElimination.cpp | 381 Register DefReg = MI->getOperand(0).getReg(); in optimizeBlock() local 384 if (!MRI->isReserved(DefReg) && in optimizeBlock() 388 if (KnownReg.Reg != DefReg && in optimizeBlock() 389 !TRI->isSuperRegister(DefReg, KnownReg.Reg)) in optimizeBlock() 413 if (TRI->isSuperRegister(DefReg, KnownReg.Reg) && KnownReg.Imm < 0) in optimizeBlock()
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| H A D | AArch64MIPeepholeOpt.cpp | 246 Register DefReg = MI.getOperand(0).getReg(); in visitORR() local 248 MRI->replaceRegWith(DefReg, SrcReg); in visitORR()
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| /openbsd-src/gnu/llvm/llvm/lib/Target/X86/ |
| H A D | X86InstructionSelector.cpp | 546 const Register DefReg = I.getOperand(0).getReg(); in selectLoadStoreOp() local 547 LLT Ty = MRI.getType(DefReg); in selectLoadStoreOp() 548 const RegisterBank &RB = *RBI.getRegBank(DefReg, MRI, TRI); in selectLoadStoreOp() 584 addFullAddress(MIB, AM).addUse(DefReg); in selectLoadStoreOp() 606 const Register DefReg = I.getOperand(0).getReg(); in selectFrameIndexOrGep() local 607 LLT Ty = MRI.getType(DefReg); in selectFrameIndexOrGep() 659 const Register DefReg = I.getOperand(0).getReg(); in selectGlobalValue() local 660 LLT Ty = MRI.getType(DefReg); in selectGlobalValue() 678 const Register DefReg = I.getOperand(0).getReg(); in selectConstant() local 679 LLT Ty = MRI.getType(DefReg); in selectConstant() [all …]
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| H A D | X86DomainReassignment.cpp | 593 Register DefReg = DefOp.getReg(); in buildClosure() local 594 if (!DefReg.isVirtual()) { in buildClosure() 598 visitRegister(C, DefReg, Domain, Worklist); in buildClosure()
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| H A D | X86LoadValueInjectionLoadHardening.cpp | 370 RegisterRef DefReg = Def.Addr->getRegRef(DFG); in getGadgetGraph() local 371 for (auto UseID : L.getAllReachedUses(DefReg, Def)) { in getGadgetGraph() 376 if (DFG.getPRI().alias(RegisterRef(I.first), DefReg)) { in getGadgetGraph()
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| /openbsd-src/gnu/llvm/llvm/lib/Target/PowerPC/ |
| H A D | PPCVSXSwapRemoval.cpp | 673 Register DefReg = MI->getOperand(0).getReg(); in recordUnoptimizableWebs() local 679 for (MachineInstr &UseMI : MRI->use_nodbg_instructions(DefReg)) { in recordUnoptimizableWebs() 726 Register DefReg = DefMI->getOperand(0).getReg(); in recordUnoptimizableWebs() local 745 for (MachineInstr &UseMI : MRI->use_nodbg_instructions(DefReg)) { in recordUnoptimizableWebs() 785 Register DefReg = MI->getOperand(0).getReg(); in markSwapsForRemoval() local 787 for (MachineInstr &UseMI : MRI->use_nodbg_instructions(DefReg)) { in markSwapsForRemoval()
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| H A D | PPCPreEmitPeephole.cpp | 260 Register DefReg; in addLinkerOpt() member 292 if (!BBI->readsRegister(Pair.DefReg, TRI) && in addLinkerOpt() 293 !BBI->modifiesRegister(Pair.DefReg, TRI)) in addLinkerOpt() 302 if (UseOp && UseOp->isReg() && UseOp->getReg() == Pair.DefReg && in addLinkerOpt()
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| /openbsd-src/gnu/llvm/llvm/lib/Target/Mips/ |
| H A D | Mips16InstrInfo.cpp | 369 int DefReg = 0; in loadImmediate() local 373 DefReg = MO.getReg(); in loadImmediate() 392 if (DefReg != Reg) { in loadImmediate() 407 if (DefReg!= SpReg) { in loadImmediate()
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| /openbsd-src/gnu/llvm/llvm/lib/Target/AArch64/GISel/ |
| H A D | AArch64InstructionSelector.cpp | 265 MachineInstr *emitADD(Register DefReg, MachineOperand &LHS, 2242 Register DefReg = I.getOperand(0).getReg(); in earlySelect() local 2243 LLT Ty = MRI.getType(DefReg); in earlySelect() 2246 RBI.constrainGenericRegister(DefReg, AArch64::GPR64RegClass, MRI); in earlySelect() 2249 RBI.constrainGenericRegister(DefReg, AArch64::GPR32RegClass, MRI); in earlySelect() 2392 const Register DefReg = I.getOperand(0).getReg(); in select() local 2393 const LLT DefTy = MRI.getType(DefReg); in select() 2396 MRI.getRegClassOrRegBank(DefReg); in select() 2415 return RBI.constrainGenericRegister(DefReg, *DefRC, MRI); in select() 2562 const Register DefReg = I.getOperand(0).getReg(); in select() local [all …]
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| /openbsd-src/gnu/llvm/llvm/lib/Target/AMDGPU/ |
| H A D | SIFoldOperands.cpp | 1690 Register DefReg = Def.getReg(); in tryFoldLoad() local 1692 if (DefReg.isPhysical() || !TRI->isVGPR(*MRI, DefReg)) in tryFoldLoad() 1697 for (const MachineInstr &I : MRI->use_nodbg_instructions(DefReg)) in tryFoldLoad() 1719 const TargetRegisterClass *RC = MRI->getRegClass(DefReg); in tryFoldLoad() 1720 MRI->setRegClass(DefReg, TRI->getEquivalentAGPRClass(RC)); in tryFoldLoad() 1722 MRI->setRegClass(DefReg, RC); in tryFoldLoad()
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| /openbsd-src/gnu/llvm/llvm/lib/Target/ARM/ |
| H A D | A15SDOptimizer.cpp | 214 Register DefReg = MODef.getReg(); in eraseInstrWithNoUses() local 215 if (!DefReg.isVirtual()) { in eraseInstrWithNoUses()
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| /openbsd-src/gnu/llvm/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | FastISel.cpp | 177 static bool isRegUsedByPhiNodes(Register DefReg, in isRegUsedByPhiNodes() argument 180 if (P.second == DefReg) in isRegUsedByPhiNodes() 199 Register DefReg = findLocalRegDef(LocalMI); in flushLocalValueMap() local 200 if (!DefReg) in flushLocalValueMap() 202 if (FuncInfo.RegsWithFixups.count(DefReg)) in flushLocalValueMap() 204 bool UsedByPHI = isRegUsedByPhiNodes(DefReg, FuncInfo); in flushLocalValueMap() 205 if (!UsedByPHI && MRI.use_nodbg_empty(DefReg)) { in flushLocalValueMap()
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| /openbsd-src/gnu/llvm/llvm/lib/Target/Hexagon/ |
| H A D | HexagonBitTracker.cpp | 1044 unsigned DefReg = 0; in getUniqueDefVReg() local 1051 if (DefReg != 0) in getUniqueDefVReg() 1053 DefReg = R; in getUniqueDefVReg() 1055 return DefReg; in getUniqueDefVReg()
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