| /openbsd-src/gnu/llvm/llvm/lib/CodeGen/ |
| H A D | MachineLateInstrsCleanup.cpp | 212 auto DefI = MBBDefs.find(DefedReg); in processBlock() local 213 if (DefI != MBBDefs.end() && MI.isIdenticalTo(*DefI->second)) { in processBlock() 223 for (auto DefI = MBBDefs.begin(); DefI != MBBDefs.end();) { in processBlock() local 224 Register Reg = DefI->first; in processBlock() 226 DefI = MBBDefs.erase(DefI); in processBlock() 228 ++DefI; in processBlock()
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| H A D | MIRCanonicalizerPass.cpp | 229 MachineBasicBlock::iterator DefI = BBE; in rescheduleCanonically() local 234 if (DefI != BBE && UseI != BBE) in rescheduleCanonically() 238 DefI = BBI; in rescheduleCanonically() 248 if (DefI == BBE || UseI == BBE) in rescheduleCanonically() 253 DefI->dump(); in rescheduleCanonically() 260 MBB->splice(UseI, MBB, DefI); in rescheduleCanonically()
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| H A D | MachineTraceMetrics.cpp | 638 MachineRegisterInfo::def_iterator DefI = MRI->def_begin(VirtReg); in DataDep() local 639 assert(!DefI.atEnd() && "Register has no defs"); in DataDep() 640 DefMI = DefI->getParent(); in DataDep() 641 DefOp = DefI.getOperandNo(); in DataDep() 642 assert((++DefI).atEnd() && "Register has multiple defs"); in DataDep()
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| /openbsd-src/gnu/llvm/llvm/lib/Target/Hexagon/ |
| H A D | HexagonGenPredicate.cpp | 232 MachineInstr *DefI = MRI->getVRegDef(Reg.R); in processPredicateGPR() local 233 DefI->eraseFromParent(); in processPredicateGPR() 254 MachineInstr *DefI = MRI->getVRegDef(Reg.R); in getPredRegFor() local 255 assert(DefI); in getPredRegFor() 256 unsigned Opc = DefI->getOpcode(); in getPredRegFor() 258 assert(DefI->getOperand(0).isDef() && DefI->getOperand(1).isUse()); in getPredRegFor() 259 RegisterSubReg PR = DefI->getOperand(1); in getPredRegFor() 265 MachineBasicBlock &B = *DefI->getParent(); in getPredRegFor() 266 DebugLoc DL = DefI->getDebugLoc(); in getPredRegFor() 272 if (isConvertibleToPredForm(DefI)) { in getPredRegFor() [all …]
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| H A D | HexagonExpandCondsets.cpp | 344 MachineInstr *DefI = LIS->getInstructionFromIndex(NextI->start); in updateKillFlags() local 345 if (HII->isPredicated(*DefI)) in updateKillFlags() 421 MachineInstr *DefI = LIS->getInstructionFromIndex(Seg.start); in updateDeadsInRange() local 422 Defs.insert(DefI->getParent()); in updateDeadsInRange() 423 if (HII->isPredicated(*DefI)) in updateDeadsInRange() 475 MachineInstr *DefI = LIS->getInstructionFromIndex(Seg.start); in updateDeadsInRange() local 476 for (auto &Op : DefI->operands()) { in updateDeadsInRange() 492 MachineInstr *DefI = LIS->getInstructionFromIndex(Seg.start); in updateDeadsInRange() local 493 if (!HII->isPredicated(*DefI)) in updateDeadsInRange() 499 for (unsigned i = 0, e = DefI->getNumOperands(); i != e; ++i) { in updateDeadsInRange() [all …]
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| H A D | HexagonVExtract.cpp | 149 MachineInstr *DefI = MRI.getVRegDef(VecR); in runOnMachineFunction() local 150 MachineBasicBlock::iterator At = std::next(DefI->getIterator()); in runOnMachineFunction() 151 MachineBasicBlock &DefB = *DefI->getParent(); in runOnMachineFunction() 155 Register AddrR = EmitAddr(DefB, At, DefI->getDebugLoc(), FI, 0); in runOnMachineFunction() 156 BuildMI(DefB, At, DefI->getDebugLoc(), HII->get(StoreOpc)) in runOnMachineFunction()
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| H A D | HexagonSplitDouble.cpp | 235 MachineInstr *DefI = MRI->getVRegDef(R); in partitionRegisters() local 239 if (!DefI || isFixedInstr(DefI)) in partitionRegisters() 404 const MachineInstr *DefI = MRI->getVRegDef(Reg); in profit() local 405 switch (DefI->getOpcode()) { in profit() 413 return profit(DefI); in profit() 426 MachineInstr *DefI = MRI->getVRegDef(DR); in isProfitable() local 427 int32_t P = profit(DefI); in isProfitable() 1135 MachineInstr *DefI = MRI->getVRegDef(DR); in splitPartition() local 1136 SplitIns.insert(DefI); in splitPartition()
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| H A D | HexagonGenInsert.cpp | 1007 const MachineInstr *DefI = MRI->getVRegDef(R); in findRemovableRegisters() local 1008 assert(DefI); in findRemovableRegisters() 1012 if (DefI->isPHI()) in findRemovableRegisters() 1014 getInstrUses(DefI, Regs[OtherS]); in findRemovableRegisters() 1143 const MachineInstr *DefI = MRI->getVRegDef(IR); in pruneUsesTooFar() local 1146 unsigned DIV = distance(DefI, DefV, RPO, M); in pruneUsesTooFar() 1329 const MachineInstr *DefI = MRI->getVRegDef(I->first); in selectCandidates() local 1330 getInstrUses(DefI, Us); in selectCandidates() 1427 MachineInstr *DefI = MRI->getVRegDef(I.first); in generateInserts() local 1429 DefI->eraseFromParent(); in generateInserts()
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| H A D | HexagonEarlyIfConv.cpp | 408 const MachineInstr *DefI = MRI->getVRegDef(R); in usesUndefVReg() local 410 assert(DefI && "Expecting a reaching def in MRI"); in usesUndefVReg() 411 if (DefI->isImplicitDef()) in usesUndefVReg()
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| H A D | HexagonConstExtenders.cpp | 1506 const MachineInstr *DefI = Rs.isVReg() ? MRI->getVRegDef(Rs.Reg) : nullptr; in calculatePlacement() local 1510 assert(!DefI || MDT->dominates(DefI->getParent(), DomB)); in calculatePlacement()
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| H A D | HexagonBitSimplify.cpp | 2323 MachineInstr *DefI = MRI.getVRegDef(Op0.getReg()); in genBitSplit() local 2324 assert(DefI != nullptr); in genBitSplit() 2325 if (!MDT.dominates(DefI, &*At)) in genBitSplit()
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| /openbsd-src/gnu/llvm/llvm/lib/Target/WebAssembly/ |
| H A D | WebAssemblyRegStackify.cpp | 316 const MachineInstr *DefI = Def->getParent(); in isSafeToMove() local 318 assert(DefI->getParent() == Insert->getParent()); in isSafeToMove() 332 if (Def != DefI->defs().begin()) in isSafeToMove() 340 for (const auto &SubsequentDef : drop_begin(DefI->defs())) { in isSafeToMove() 341 auto I = std::next(MachineBasicBlock::const_iterator(DefI)); in isSafeToMove() 354 const MachineBasicBlock *MBB = DefI->getParent(); in isSafeToMove() 355 auto NextI = std::next(MachineBasicBlock::const_iterator(DefI)); in isSafeToMove() 363 if (WebAssembly::isCatch(DefI->getOpcode())) in isSafeToMove() 368 for (const MachineOperand &MO : DefI->operands()) { in isSafeToMove() 398 query(*DefI, Read, Write, Effects, StackPointer); in isSafeToMove() [all …]
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| /openbsd-src/gnu/llvm/llvm/lib/Target/AMDGPU/ |
| H A D | AMDGPUSubtarget.cpp | 824 MachineInstr *DefI = Def->getInstr(); in adjustSchedDependency() local 827 if (DefI->isBundle()) { in adjustSchedDependency() 830 MachineBasicBlock::const_instr_iterator I(DefI->getIterator()); in adjustSchedDependency() 831 MachineBasicBlock::const_instr_iterator E(DefI->getParent()->instr_end()); in adjustSchedDependency() 845 unsigned Lat = InstrInfo.getInstrLatency(getInstrItineraryData(), *DefI); in adjustSchedDependency() 858 DefI, DefOpIdx, UseI, UseOpIdx)); in adjustSchedDependency()
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| /openbsd-src/gnu/llvm/llvm/lib/Transforms/Scalar/ |
| H A D | DeadStoreElimination.cpp | 1776 Instruction *DefI = Def->getMemoryInst(); in eliminateDeadWritesAtEndOfFunction() local 1777 auto DefLoc = getLocForWrite(DefI); in eliminateDeadWritesAtEndOfFunction() 1778 if (!DefLoc || !isRemovable(DefI)) in eliminateDeadWritesAtEndOfFunction() 1794 deleteDeadInstruction(DefI); in eliminateDeadWritesAtEndOfFunction() 1806 Instruction *DefI = Def->getMemoryInst(); in tryFoldIntoCalloc() local 1807 MemSetInst *MemSet = dyn_cast<MemSetInst>(DefI); in tryFoldIntoCalloc() 1815 if (!isRemovable(DefI)) in tryFoldIntoCalloc() 1883 Instruction *DefI = Def->getMemoryInst(); in storeIsNoop() local 1884 StoreInst *Store = dyn_cast<StoreInst>(DefI); in storeIsNoop() 1885 MemSetInst *MemSet = dyn_cast<MemSetInst>(DefI); in storeIsNoop() [all …]
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| /openbsd-src/gnu/llvm/llvm/include/llvm/Analysis/ |
| H A D | LoopInfo.h | 1216 auto *DefI = dyn_cast<Instruction>(U.get()); in movementPreservesLCSSAForm() local 1217 if (!DefI) in movementPreservesLCSSAForm() 1223 auto *DefBlock = DefI->getParent(); in movementPreservesLCSSAForm()
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| /openbsd-src/gnu/llvm/llvm/lib/Transforms/Utils/ |
| H A D | ScalarEvolutionExpander.cpp | 2524 auto *DefI = dyn_cast<Instruction>(V); in fixupLCSSAFormFor() local 2525 if (!PreserveLCSSA || !DefI) in fixupLCSSAFormFor() 2529 Loop *DefLoop = SE.LI.getLoopFor(DefI->getParent()); in fixupLCSSAFormFor() 2542 if (DefI->getType()->isIntegerTy()) in fixupLCSSAFormFor() 2543 ToTy = DefI->getType()->getPointerTo(); in fixupLCSSAFormFor() 2545 ToTy = Type::getInt32Ty(DefI->getContext()); in fixupLCSSAFormFor() 2547 CastInst::CreateBitOrPointerCast(DefI, ToTy, "tmp.lcssa.user", InsertPt); in fixupLCSSAFormFor() 2552 ToUpdate.push_back(DefI); in fixupLCSSAFormFor()
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| H A D | SimplifyIndVar.cpp | 1150 auto *DefI = dyn_cast<Instruction>(Def); in getInsertPointForUses() local 1151 if (!DefI) in getInsertPointForUses() 1154 assert(DT->dominates(DefI, InsertPt) && "def does not dominate all uses"); in getInsertPointForUses() 1156 auto *L = LI->getLoopFor(DefI->getParent()); in getInsertPointForUses()
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| /openbsd-src/gnu/llvm/clang/utils/TableGen/ |
| H A D | NeonEmitter.cpp | 1412 DefInit *DefI = cast<DefInit>(DI->getOperator()); in emitDag() local 1413 std::string Op = DefI->getAsString(); in emitDag()
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| /openbsd-src/gnu/llvm/llvm/lib/TableGen/ |
| H A D | Record.cpp | 2367 if (DefInit *DefI = dyn_cast<DefInit>(Val)) in getOperatorAsDef() local 2368 return DefI->getDef(); in getOperatorAsDef()
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| /openbsd-src/gnu/llvm/llvm/lib/Analysis/ |
| H A D | ScalarEvolution.cpp | 2937 auto *DefI = getDefiningScopeBound(LIOps); in getAddExpr() local 2939 if (!isGuaranteedToTransferExecutionTo(DefI, ReachI)) in getAddExpr() 7229 if (auto *DefI = getNonTrivialDefiningScopeBound(S)) { in getDefiningScopeBound() local 7230 if (!Bound || DT.dominates(Bound, DefI)) in getDefiningScopeBound() 7231 Bound = DefI; in getDefiningScopeBound() 7288 auto *DefI = getDefiningScopeBound(SCEVOps); in isSCEVExprNeverPoison() local 7289 return isGuaranteedToTransferExecutionTo(DefI, I); in isSCEVExprNeverPoison()
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