| /openbsd-src/gnu/llvm/llvm/lib/Target/ARM/ |
| H A D | ARMInstrNEON.td | 128 def VecListOneD : RegisterOperand<DPR, "printVectorListOne"> {
146 def VecListThreeD : RegisterOperand<DPR, "printVectorListThree"> {
155 def VecListFourD : RegisterOperand<DPR, "printVectorListFour"> {
173 def VecListThreeQ : RegisterOperand<DPR, "printVectorListThreeSpaced"> {
182 def VecListFourQ : RegisterOperand<DPR, "printVectorListFourSpaced"> {
192 def VecListOneDAllLanes : RegisterOperand<DPR, "printVectorListOneAllLanes"> {
221 def VecListThreeDAllLanes : RegisterOperand<DPR,
231 def VecListThreeQAllLanes : RegisterOperand<DPR,
241 def VecListFourDAllLanes : RegisterOperand<DPR, "printVectorListFourAllLanes"> {
250 def VecListFourQAllLanes : RegisterOperand<DPR,
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| H A D | ARMInstrVFP.td | 154 def VLDRD : ADI5<0b1101, 0b01, (outs DPR:$Dd), (ins addrmode5:$addr),
156 [(set DPR:$Dd, (f64 (alignedload32 addrmode5:$addr)))]>,
189 def VSTRD : ADI5<0b1101, 0b00, (outs), (ins DPR:$Dd, addrmode5:$addr),
191 [(alignedstore32 (f64 DPR:$Dd), addrmode5:$addr)]>,
405 (outs DPR:$Dd), (ins DPR:$Dn, DPR:$Dm),
407 [(set DPR:$Dd, (fadd DPR:$Dn, (f64 DPR:$Dm)))]>,
430 (outs DPR:$Dd), (ins DPR:$Dn, DPR:$Dm),
432 [(set DPR:$Dd, (fsub DPR:$Dn, (f64 DPR:$Dm)))]>,
455 (outs DPR:$Dd), (ins DPR:$Dn, DPR:$Dm),
457 [(set DPR:$Dd, (fdiv DPR:$Dn, (f64 DPR:$Dm)))]>,
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| H A D | ARMRegisterInfo.td | 446 def DPR : RegisterClass<"ARM", [f64, v8i8, v4i16, v2i32, v1i64, v2f32, v4f16, v4bf16], 64,
450 let AltOrders = [(rotl DPR, 16),
451 (add (decimate (rotl DPR, 16), 2), (rotl DPR, 16))];
455 let DiagnosticType = "DPR";
461 def FPWithVPR : RegisterClass<"ARM", [f32], 32, (add SPR, DPR, VPR)> {
465 // Subset of DPR that are accessible with VFP2 (and so that also have
468 (trunc DPR, 16)> {
472 // Subset of DPR which can be used as a source of NEON scalars for 16-bit
475 (trunc DPR, 8)> {
513 [(decimate (shl DPR, 1), 2),
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| H A D | ARMInstrCDE.td | 554 def : Pat<(f64 (int_arm_cde_vcx1a timm:$coproc, (f64 DPR:$acc), timm:$imm)),
555 (f64 (CDE_VCX1A_fpdp p_imm:$coproc, DPR:$acc, imm_11b:$imm))>;
562 def : Pat<(f64 (int_arm_cde_vcx2 timm:$coproc, (f64 DPR:$n), timm:$imm)),
563 (f64 (CDE_VCX2_fpdp p_imm:$coproc, DPR:$n, imm_6b:$imm))>;
564 def : Pat<(f64 (int_arm_cde_vcx2a timm:$coproc, (f64 DPR:$acc), (f64 DPR:$n),
566 (f64 (CDE_VCX2A_fpdp p_imm:$coproc, DPR:$acc, DPR:$n, imm_6b:$imm))>;
576 def : Pat<(f64 (int_arm_cde_vcx3 timm:$coproc, (f64 DPR:$n), (f64 DPR:$m),
578 (f64 (CDE_VCX3_fpdp p_imm:$coproc, DPR:$n, DPR:$m, imm_3b:$imm))>;
579 def : Pat<(f64 (int_arm_cde_vcx3a timm:$coproc, (f64 DPR:$acc), (f64 DPR:$n),
580 (f64 DPR:$m), timm:$imm)),
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| H A D | ARMRegisterBanks.td | 13 def FPRRegBank : RegisterBank<"FPRB", [HPR, SPR, DPR, QPR]>;
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| H A D | README.txt | 170 before the call and place the result in a callee-save DPR register. The two
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| H A D | ARMInstrMVE.td | 1850 def : Pat<(insertelt (v2f64 MQPR:$src1), DPR:$src2, imm:$lane),
1851 …(INSERT_SUBREG (v2f64 (COPY_TO_REGCLASS MQPR:$src1, MQPR)), DPR:$src2, (DSubReg_f64_reg imm:$lane)…
1926 def : Pat<(v2f64 (scalar_to_vector (f64 DPR:$src))),
1927 (INSERT_SUBREG (v2f64 (IMPLICIT_DEF)), DPR:$src, dsub_0)>;
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| /openbsd-src/sys/dev/pci/bktr/ |
| H A D | bktr_os.c | 78 #define DPR(x) (bktr_debug ? printf x : 0) macro
80 #define DPR(x) macro
173 DPR((" fun=%b", fun, PCI_COMMAND_STATUS_BITS)); in bktr_attach()
183 DPR(("pci_mapreg_map: memt %lx, memh %lx, size %x\n", in bktr_attach()
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| /openbsd-src/sys/dev/pci/ |
| H A D | ahc_pci.c | 630 #define DPR 0x01 macro
1393 if (status1 & DPR) { in ahc_pci_intr()
1401 if ((status1 & (DPE|SSE|RMA|RTA|STA|DPR)) == 0) { in ahc_pci_intr()
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| H A D | ahd_pci.c | 887 #define DPR 0x01 macro
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| /openbsd-src/sys/dev/microcode/aic7xxx/ |
| H A D | aic79xx.reg | 1097 field DPR 0x01
1114 field DPR 0x01
1130 field DPR 0x01
1147 field DPR 0x01
1163 field DPR 0x01
1178 field DPR 0x01
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| H A D | aic79xx_reg.h | 3312 #define DPR 0x01 macro
|