Searched refs:CondBr (Results 1 – 7 of 7) sorted by relevance
| /openbsd-src/gnu/llvm/llvm/lib/Target/AArch64/ |
| H A D | AArch64RedundantCopyElimination.cpp | 92 bool knownRegValInBlock(MachineInstr &CondBr, MachineBasicBlock *MBB, 124 MachineInstr &CondBr, MachineBasicBlock *MBB, in knownRegValInBlock() argument 126 unsigned Opc = CondBr.getOpcode(); in knownRegValInBlock() 131 MBB == CondBr.getOperand(1).getMBB()) || in knownRegValInBlock() 133 MBB != CondBr.getOperand(1).getMBB())) { in knownRegValInBlock() 134 FirstUse = CondBr; in knownRegValInBlock() 135 KnownRegs.push_back(RegImm(CondBr.getOperand(0).getReg(), 0)); in knownRegValInBlock() 144 AArch64CC::CondCode CC = (AArch64CC::CondCode)CondBr.getOperand(0).getImm(); in knownRegValInBlock() 148 MachineBasicBlock *BrTarget = CondBr.getOperand(1).getMBB(); in knownRegValInBlock() 155 assert(PredMBB == CondBr.getParent() && in knownRegValInBlock() [all …]
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| /openbsd-src/gnu/llvm/llvm/lib/Target/RISCV/ |
| H A D | RISCVRedundantCopyElimination.cpp | 143 MachineBasicBlock::iterator CondBr = PredMBB->getFirstTerminator(); in optimizeBlock() local 144 assert((CondBr->getOpcode() == RISCV::BEQ || in optimizeBlock() 145 CondBr->getOpcode() == RISCV::BNE) && in optimizeBlock() 147 assert(CondBr->getOperand(0).getReg() == TargetReg && "Unexpected register"); in optimizeBlock() 151 CondBr->clearRegisterKills(TargetReg, TRI); in optimizeBlock()
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| /openbsd-src/gnu/llvm/llvm/lib/Transforms/Vectorize/ |
| H A D | VPlanRecipes.cpp | 313 BranchInst *CondBr = in generateInstruction() local 317 CondBr->setSuccessor(1, State.CFG.VPBB2IRBB[Header]); in generateInstruction() 319 CondBr->setSuccessor(0, nullptr); in generateInstruction() 341 BranchInst *CondBr = Builder.CreateCondBr(Cond, Builder.GetInsertBlock(), in generateInstruction() local 343 CondBr->setSuccessor(0, nullptr); in generateInstruction() 961 auto *CondBr = BranchInst::Create(State.CFG.PrevBB, nullptr, ConditionBit); in execute() local 962 CondBr->setSuccessor(0, nullptr); in execute() 963 ReplaceInstWithInst(CurrentTerminator, CondBr); in execute()
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| /openbsd-src/gnu/llvm/llvm/lib/Transforms/Scalar/ |
| H A D | JumpThreading.cpp | 219 BranchInst *CondBr = dyn_cast<BranchInst>(BB->getTerminator()); in updatePredecessorProfileMetadata() local 220 if (!CondBr) in updatePredecessorProfileMetadata() 224 if (!extractBranchWeights(*CondBr, TrueWeight, FalseWeight)) in updatePredecessorProfileMetadata() 2173 BranchInst *CondBr = dyn_cast<BranchInst>(BB->getTerminator()); in maybethreadThroughTwoBasicBlocks() local 2174 if (!CondBr) in maybethreadThroughTwoBasicBlocks() 2247 BasicBlock *SuccBB = CondBr->getSuccessor(PredPredBB == ZeroPred); in maybethreadThroughTwoBasicBlocks() 2301 BranchInst *CondBr = cast<BranchInst>(BB->getTerminator()); in threadThroughTwoBasicBlocks() local 2342 {{DominatorTree::Insert, NewBB, CondBr->getSuccessor(0)}, in threadThroughTwoBasicBlocks() 2343 {DominatorTree::Insert, NewBB, CondBr->getSuccessor(1)}, in threadThroughTwoBasicBlocks() 2849 BranchInst *CondBr = dyn_cast<BranchInst>(BB->getTerminator()); in tryToUnfoldSelect() local [all …]
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| /openbsd-src/gnu/llvm/llvm/lib/Target/X86/ |
| H A D | X86SpeculativeLoadHardening.cpp | 721 for (auto *CondBr : CondBrs) in tracePredStateThroughCFG() local 722 ++SuccCounts[CondBr->getOperand(0).getMBB()]; in tracePredStateThroughCFG() 787 for (auto *CondBr : CondBrs) { in tracePredStateThroughCFG() local 788 MachineBasicBlock &Succ = *CondBr->getOperand(0).getMBB(); in tracePredStateThroughCFG() 791 X86::CondCode Cond = X86::getCondFromBranch(*CondBr); in tracePredStateThroughCFG() 795 BuildCheckingBlockForSuccAndConds(MBB, Succ, SuccCount, CondBr, UncondBr, in tracePredStateThroughCFG()
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| /openbsd-src/gnu/llvm/llvm/lib/Target/AMDGPU/ |
| H A D | SIInstrInfo.cpp | 2802 MachineInstr *CondBr = in insertBranch() local 2807 preserveCondRegFlags(CondBr->getOperand(1), Cond[1]); in insertBranch() 2808 fixImplicitOperands(*CondBr); in insertBranch() 2817 MachineInstr *CondBr = in insertBranch() local 2820 fixImplicitOperands(*CondBr); in insertBranch() 2824 MachineOperand &CondReg = CondBr->getOperand(1); in insertBranch()
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| /openbsd-src/gnu/llvm/llvm/lib/Target/PowerPC/ |
| H A D | PPCRegisterInfo.td | 750 let Name = "CondBr"; let PredicateMethod = "isCondBr";
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