Searched refs:CSEL (Results 1 – 12 of 12) sorted by relevance
| /openbsd-src/gnu/llvm/llvm/lib/Target/AArch64/ |
| H A D | AArch64ISelLowering.cpp | 2129 case AArch64ISD::CSEL: { in computeKnownBitsForTargetNode() 2302 MAKE_CASE(AArch64ISD::CSEL) in getTargetNodeName() 3668 return DAG.getNode(AArch64ISD::CSEL, dl, Op.getValueType(), TVal, FVal, in LowerXOR() 3718 return DAG.getNode(AArch64ISD::CSEL, dl, Sel.getValueType(), FVal, TVal, in LowerXOR() 3748 return DAG.getNode(AArch64ISD::CSEL, DL, VT, One, Zero, CC, Flag); in carryFlagToValue() 3758 return DAG.getNode(AArch64ISD::CSEL, DL, VT, One, Zero, CC, Flag); in overflowFlagToValue() 3808 Overflow = DAG.getNode(AArch64ISD::CSEL, dl, MVT::i32, FVal, TVal, in LowerXALUO() 5779 return DAG.getNode(AArch64ISD::CSEL, DL, VT, Op.getOperand(0), Neg, in LowerABS() 8910 SDValue Res = DAG.getNode(AArch64ISD::CSEL, dl, VT, FVal, TVal, CCVal, Cmp); in LowerSETCC() 8937 Res = DAG.getNode(AArch64ISD::CSEL, dl, VT, FVal, TVal, CC1Val, Cmp); in LowerSETCC() [all …]
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| H A D | AArch64SchedThunderX3T110.td | 694 "CCMP(W|X)(i|r)", "CSEL(W|X)r", 716 "CCMP(W|X)(i|r)", "CSEL(W|X)r", 735 "CCMP(W|X)(i|r)", "CSEL(W|X)r",
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| H A D | AArch64SchedThunderX2T99.td | 434 "CCMP(W|X)(i|r)", "CSEL(W|X)r", 456 "CCMP(W|X)(i|r)", "CSEL(W|X)r", 475 "CCMP(W|X)(i|r)", "CSEL(W|X)r",
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| H A D | AArch64ISelLowering.h | 82 CSEL, enumerator
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| H A D | AArch64SchedA64FX.td | 611 "CCMP(W|X)(i|r)", "CSEL(W|X)r", 631 "CCMP(W|X)(i|r)", "CSEL(W|X)r", 648 "CCMP(W|X)(i|r)", "CSEL(W|X)r",
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| H A D | AArch64SchedCyclone.td | 149 // CSEL,CSINC,CSINV,CSNEG
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| H A D | AArch64SchedTSV110.td | 404 def : InstRW<[TSV110Wr_1cyc_1ALUAB], (instregex "^(CSEL|CSINC|CSINV|CSNEG)(W|X)r$")>;
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| H A D | AArch64SchedAmpere1.td | 948 (instregex "(CSEL|CSINC|CSINV|CSNEG)(X|W)")>;
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| H A D | AArch64SchedFalkorDetails.td | 894 def : InstRW<[FalkorWr_1XYZ_1cyc], (instregex "^(CSEL|CSINC|CSINV|CSNEG)(W|X)r$")>;
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| H A D | AArch64SchedKryoDetails.td | 543 (instregex "CSEL(W|X)r")>;
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| H A D | AArch64InstrInfo.td | 605 def AArch64csel : SDNode<"AArch64ISD::CSEL", SDT_AArch64CSel>; 2435 defm CSEL : CondSelect<0, 0b00, "csel">; 4388 // CSEL instructions providing f128 types need to be handled by a
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| /openbsd-src/gnu/llvm/llvm/lib/Target/ARM/ |
| H A D | ARMInstrThumb2.td | 426 // CSEL aliases inverted predicate 758 // CSEL). Setting Unpredictable{15} = 1 here would reintroduce
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