| /openbsd-src/gnu/llvm/clang/lib/AST/ |
| H A D | ComparisonCategories.cpp | 186 using CCVT = ComparisonCategoryResult; in getResultString() typedef
188 case CCVT::Equal: in getResultString()
190 case CCVT::Equivalent: in getResultString()
192 case CCVT::Less: in getResultString()
194 case CCVT::Greater: in getResultString()
196 case CCVT::Unordered: in getResultString()
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| /openbsd-src/gnu/llvm/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | DAGCombiner.cpp | 4371 EVT CCVT = getSetCCResultType(VT); in visitSDIV() local
4390 return DAG.getSelect(DL, VT, DAG.getSetCC(DL, CCVT, N0, N1, ISD::SETEQ), in visitSDIV()
4449 EVT CCVT = getSetCCResultType(VT); in visitSDIVLike() local
4487 SDValue IsOne = DAG.getSetCC(DL, CCVT, N1, One, ISD::SETEQ); in visitSDIVLike()
4488 SDValue IsAllOnes = DAG.getSetCC(DL, CCVT, N1, AllOnes, ISD::SETEQ); in visitSDIVLike()
4489 SDValue IsOneOrAllOnes = DAG.getNode(ISD::OR, DL, CCVT, IsOne, IsAllOnes); in visitSDIVLike()
4498 SDValue IsNeg = DAG.getSetCC(DL, CCVT, N1, Zero, ISD::SETLT); in visitSDIVLike()
4519 EVT CCVT = getSetCCResultType(VT); in visitUDIV() local
4533 if (N1C && N1C->isAllOnes() && CCVT.isVector() == VT.isVector()) { in visitUDIV()
4534 return DAG.getSelect(DL, VT, DAG.getSetCC(DL, CCVT, N0, N1, ISD::SETEQ), in visitUDIV()
[all …]
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| H A D | SelectionDAGBuilder.cpp | 7266 EVT CCVT = TLI.getValueType(DAG.getDataLayout(), I.getType()); in visitIntrinsicCall() local
7270 if (!TLI.shouldExpandGetActiveLaneMask(CCVT, ElementVT)) { in visitIntrinsicCall()
7276 auto VecTy = CCVT.changeVectorElementType(ElementVT); in visitIntrinsicCall()
7283 SDValue SetCC = DAG.getSetCC(sdl, CCVT, VectorInduction, in visitIntrinsicCall()
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| H A D | LegalizeDAG.cpp | 3735 EVT CCVT = getSetCCResultType(CmpVT); in ExpandNode() local
3736 SDValue Cond = DAG.getNode(ISD::SETCC, dl, CCVT, Tmp1, Tmp2, CC, Node->getFlags()); in ExpandNode()
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| H A D | TargetLowering.cpp | 6746 EVT CCVT = getSetCCResultType(DAG.getDataLayout(), *DAG.getContext(), VT); in getSqrtInputTest() local
6758 return DAG.getSetCC(DL, CCVT, Fabs, NormC, ISD::SETLT); in getSqrtInputTest()
6761 return DAG.getSetCC(DL, CCVT, Op, FPZero, ISD::SETEQ); in getSqrtInputTest()
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| /openbsd-src/gnu/llvm/llvm/lib/Target/AMDGPU/ |
| H A D | AMDGPUISelLowering.cpp | 2053 EVT CCVT = getSetCCResultType(DAG.getDataLayout(), *DAG.getContext(), VT); in LowerUDIVREM() local
2055 SDValue Cond = DAG.getSetCC(DL, CCVT, R, Y, ISD::SETUGE); in LowerUDIVREM()
2062 Cond = DAG.getSetCC(DL, CCVT, R, Y, ISD::SETUGE); in LowerUDIVREM()
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| H A D | SIISelLowering.cpp | 4948 EVT CCVT = EVT::getIntegerVT(*DAG.getContext(), WavefrontSize); in lowerICMPIntrinsic() local
4950 SDValue SetCC = DAG.getNode(AMDGPUISD::SETCC, DL, CCVT, LHS, RHS, in lowerICMPIntrinsic()
4952 if (VT.bitsEq(CCVT)) in lowerICMPIntrinsic()
4979 EVT CCVT = EVT::getIntegerVT(*DAG.getContext(), WavefrontSize); in lowerFCMPIntrinsic() local
4980 SDValue SetCC = DAG.getNode(AMDGPUISD::SETCC, SL, CCVT, Src0, in lowerFCMPIntrinsic()
4982 if (VT.bitsEq(CCVT)) in lowerFCMPIntrinsic()
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| /openbsd-src/gnu/llvm/llvm/lib/Target/AArch64/ |
| H A D | AArch64ISelLowering.cpp | 9803 EVT CCVT = getSetCCResultType(DAG.getDataLayout(), *DAG.getContext(), VT); in getSqrtInputTest() local
9805 return DAG.getSetCC(DL, CCVT, Op, FPZero, ISD::SETEQ); in getSqrtInputTest()
20561 EVT CCVT = N0.getValueType(); in performVSelectCombine() local
20602 CCVT.getVectorElementCount() != ElementCount::getFixed(1) || in performVSelectCombine()
20603 CCVT.getVectorElementType() != MVT::i1) in performVSelectCombine()
20659 EVT CCVT = SrcVT.changeVectorElementTypeToInteger(); in performSelectCombine() local
20664 if (CCVT.getSizeInBits() != ResVT.getSizeInBits()) in performSelectCombine()
20678 SDValue SetCC = DAG.getNode(ISD::SETCC, DL, CCVT, LHS, RHS, N0.getOperand(2)); in performSelectCombine()
20681 SmallVector<int, 8> DUPMask(CCVT.getVectorNumElements(), 0); in performSelectCombine()
20682 SDValue Mask = DAG.getVectorShuffle(CCVT, DL, SetCC, SetCC, DUPMask); in performSelectCombine()
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| /openbsd-src/gnu/llvm/llvm/lib/Target/RISCV/ |
| H A D | RISCVISelLowering.cpp | 4110 EVT CCVT = in LowerOperation() local
4114 DAG.getNode(ISD::SETCC, DL, CCVT, Tmp1, Tmp2, CC, Op->getFlags()); in LowerOperation()
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| /openbsd-src/gnu/llvm/llvm/lib/Target/X86/ |
| H A D | X86ISelLowering.cpp | 45343 EVT CCVT = VT.changeVectorElementType(MVT::i1); in combineToExtendBoolVectorInReg() local
45344 Vec = DAG.getSetCC(DL, CCVT, Vec, BitMask, ISD::SETEQ); in combineToExtendBoolVectorInReg()
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