| /openbsd-src/gnu/llvm/llvm/lib/Target/X86/ |
| H A D | X86LowerAMXType.cpp | 226 void combineLoadBitcast(LoadInst *LD, BitCastInst *Bitcast);
227 void combineBitcastStore(BitCastInst *Bitcast, StoreInst *ST);
228 bool transformBitcast(BitCastInst *Bitcast);
236 void X86LowerAMXType::combineLoadBitcast(LoadInst *LD, BitCastInst *Bitcast) { in combineLoadBitcast() argument
238 Use &U = *(Bitcast->use_begin()); in combineLoadBitcast()
242 IRBuilder<> Builder(Bitcast); in combineLoadBitcast()
251 Bitcast->replaceAllUsesWith(NewInst); in combineLoadBitcast()
261 void X86LowerAMXType::combineBitcastStore(BitCastInst *Bitcast, StoreInst *ST) { in combineBitcastStore() argument
263 Value *Tile = Bitcast->getOperand(0); in combineBitcastStore()
278 if (Bitcast->hasOneUse()) in combineBitcastStore()
[all …]
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| /openbsd-src/gnu/llvm/llvm/include/llvm/MC/ |
| H A D | MCInstrDesc.h | 164 Bitcast, enumerator
352 bool isBitcast() const { return Flags & (1ULL << MCID::Bitcast); } in isBitcast()
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| /openbsd-src/gnu/llvm/llvm/lib/Target/AMDGPU/ |
| H A D | AMDGPUPreLegalizerCombiner.cpp | 145 auto Bitcast = B.buildBitcast({S32}, CvtPk); in applyClampI64ToI16() local
149 {MinBoundaryDst.getReg(0), Bitcast.getReg(0), MaxBoundaryDst.getReg(0)}, in applyClampI64ToI16()
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| H A D | AMDGPURegisterBankInfo.cpp | 1732 auto Bitcast = B.buildBitcast(S32, Src); in unpackV2S16ToS32() local
1735 auto ExtLo = B.buildSExtInReg(S32, Bitcast, 16); in unpackV2S16ToS32()
1736 auto ShiftHi = B.buildAShr(S32, Bitcast, B.buildConstant(S32, 16)); in unpackV2S16ToS32()
1740 auto ShiftHi = B.buildLShr(S32, Bitcast, B.buildConstant(S32, 16)); in unpackV2S16ToS32()
1742 auto ExtLo = B.buildAnd(S32, Bitcast, B.buildConstant(S32, 0xffff)); in unpackV2S16ToS32()
1747 return std::pair(Bitcast.getReg(0), ShiftHi.getReg(0)); in unpackV2S16ToS32()
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| /openbsd-src/gnu/llvm/llvm/lib/CodeGen/GlobalISel/ |
| H A D | LegalizerInfo.cpp | 54 case Bitcast: in operator <<()
174 case Bitcast: { in mutationIsSane()
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| H A D | LegacyLegalizerInfo.cpp | 45 case Bitcast: in operator <<()
257 case Bitcast: in findAction()
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| /openbsd-src/gnu/llvm/llvm/lib/Transforms/IPO/ |
| H A D | FunctionSpecialization.cpp | 112 if (auto *Bitcast = dyn_cast<BitCastInst>(User)) { in getPromotableAlloca() local
113 if (!Bitcast->hasOneUse() || *Bitcast->user_begin() != Call) in getPromotableAlloca()
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| /openbsd-src/gnu/llvm/llvm/lib/Target/Mips/ |
| H A D | MipsLegalizerInfo.cpp | 444 auto Bitcast = in legalizeCustom() local
451 MIRBuilder.buildFSub(Dst, Bitcast, TwoP52FP); in legalizeCustom()
453 MachineInstrBuilder ResF64 = MIRBuilder.buildFSub(s64, Bitcast, TwoP52FP); in legalizeCustom()
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| H A D | MipsISelLowering.cpp | 5008 Register Bitcast = MRI.createVirtualRegister(&Mips::MSA128WRegClass); in emitSTR_D() local
5011 BuildMI(*BB, I, DL, TII->get(Mips::COPY)).addDef(Bitcast).addUse(StoreVal); in emitSTR_D()
5014 .addUse(Bitcast) in emitSTR_D()
5018 .addUse(Bitcast) in emitSTR_D()
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| /openbsd-src/gnu/llvm/llvm/include/llvm/CodeGen/GlobalISel/ |
| H A D | LegalizerInfo.h | 73 Bitcast, enumerator
172 case LegacyLegalizeActions::Bitcast: in LegalizeActionStep()
173 Action = LegalizeActions::Bitcast; in LegalizeActionStep()
655 return actionIf(LegalizeAction::Bitcast, Predicate, Mutation); in bitcastIf()
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| H A D | LegacyLegalizerInfo.h | 54 Bitcast, enumerator
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| /openbsd-src/gnu/llvm/llvm/lib/Transforms/Utils/ |
| H A D | CodeExtractor.cpp | 548 Instruction *Bitcast = cast<Instruction>(U); in findAllocas() local
549 for (User *BU : Bitcast->users()) { in findAllocas()
561 << *Bitcast << " in out-of-region lifetime marker " in findAllocas()
581 Instruction *Bitcast = cast<Instruction>(U); in findAllocas() local
582 LifetimeMarkerInfo LMI = getLifetimeMarkers(CEAC, Bitcast, ExitBlock); in findAllocas()
584 Bitcasts.push_back(Bitcast); in findAllocas()
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| /openbsd-src/gnu/llvm/llvm/lib/Transforms/Coroutines/ |
| H A D | Coroutines.cpp | 61 auto *Bitcast = in makeSubFnCall() local
63 return Bitcast; in makeSubFnCall()
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| /openbsd-src/gnu/llvm/llvm/lib/Transforms/Vectorize/ |
| H A D | LoadStoreVectorizer.cpp | 1288 Value *Bitcast = in vectorizeLoadChain() local
1291 Builder.CreateAlignedLoad(VecTy, Bitcast, MaybeAlign(Alignment)); in vectorizeLoadChain()
1323 Instruction *BCInst = dyn_cast<Instruction>(Bitcast); in vectorizeLoadChain()
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| /openbsd-src/gnu/llvm/llvm/lib/Target/WebAssembly/ |
| H A D | WebAssemblyISelLowering.cpp | 2343 SDValue Bitcast = N->getOperand(0); in performVECTOR_SHUFFLECombine() local
2344 if (Bitcast.getOpcode() != ISD::BITCAST) in performVECTOR_SHUFFLECombine()
2348 SDValue CastOp = Bitcast.getOperand(0); in performVECTOR_SHUFFLECombine()
2350 MVT DstType = Bitcast.getSimpleValueType(); in performVECTOR_SHUFFLECombine()
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| /openbsd-src/gnu/llvm/llvm/lib/Target/AArch64/GISel/ |
| H A D | AArch64LegalizerInfo.cpp | 1233 auto Bitcast = MIRBuilder.buildBitcast(NewTy, ValReg); in legalizeLoadStore() local
1234 MIRBuilder.buildStore(Bitcast.getReg(0), MI.getOperand(1), MMO); in legalizeLoadStore()
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| /openbsd-src/gnu/llvm/llvm/lib/Transforms/InstCombine/ |
| H A D | InstCombineCompares.cpp | 2921 auto *Bitcast = dyn_cast<BitCastInst>(Cmp.getOperand(0)); in foldICmpBitCast() local
2922 if (!Bitcast) in foldICmpBitCast()
2927 Value *BCSrcOp = Bitcast->getOperand(0); in foldICmpBitCast()
2928 Type *SrcType = Bitcast->getSrcTy(); in foldICmpBitCast()
2929 Type *DstType = Bitcast->getType(); in foldICmpBitCast()
2970 if (match(Op1, m_APInt(C)) && Bitcast->hasOneUse() && in foldICmpBitCast()
3019 if (Cmp.isEquality() && C->isAllOnes() && Bitcast->hasOneUse() && in foldICmpBitCast()
3029 if (Cmp.isEquality() && C->isZero() && Bitcast->hasOneUse() && in foldICmpBitCast()
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| /openbsd-src/gnu/llvm/llvm/include/llvm/CodeGen/ |
| H A D | MachineInstr.h | 959 return hasProperty(MCID::Bitcast, Type);
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| /openbsd-src/gnu/llvm/llvm/docs/GlobalISel/ |
| H A D | GenericOpcode.rst | 157 definition of the :ref:`LLVM-IR Bitcast Instruction <i_bitcast>`. It
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| /openbsd-src/gnu/llvm/clang/include/clang/Basic/ |
| H A D | BuiltinsNVPTX.def | 534 // Bitcast
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| /openbsd-src/gnu/llvm/llvm/lib/Target/PowerPC/ |
| H A D | PPCInstrP10.td | 2328 (VINSDRX $vDi, InsertEltShift.Left3, Bitcast.DblToLong)>;
2375 (VINSDLX $vDi, InsertEltShift.Left3, Bitcast.DblToLong)>;
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| H A D | PPCISelLowering.cpp | 15470 SDNode *Bitcast = *Trunc->use_begin(); in PerformDAGCombine() local
15473 if (Bitcast->getOpcode() != ISD::BITCAST || in PerformDAGCombine()
15474 Bitcast->getValueType(0) != MVT::f32) in PerformDAGCombine()
15481 std::swap(Bitcast, Bitcast2); in PerformDAGCombine()
15515 DCI.CombineTo(Bitcast, FloatLoad2); in PerformDAGCombine()
17481 SDValue Bitcast = DCI.DAG.getBitcast(MVT::v2i64, Op0.getOperand(0)); in combineTRUNCATE() local
17483 ISD::EXTRACT_VECTOR_ELT, dl, MVT::i64, Bitcast, in combineTRUNCATE()
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| H A D | PPCInstrVSX.td | 1813 def Bitcast {
3560 def : Pat<(i32 (bitconvert f32:$A)), Bitcast.FltToInt>;
3570 def : Pat<(i64 (bitconvert f64:$A)), Bitcast.DblToLong>;
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| /openbsd-src/gnu/llvm/llvm/lib/Target/NVPTX/ |
| H A D | NVPTXISelLowering.cpp | 2225 SDValue Bitcast = DAG.getNode(ISD::BITCAST, SL, MVT::i32, A); in LowerFROUND32() local
2227 SDValue Sign = DAG.getNode(ISD::AND, SL, MVT::i32, Bitcast, in LowerFROUND32()
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| /openbsd-src/gnu/llvm/llvm/lib/Target/ARM/ |
| H A D | ARMInstrVFP.td | 1180 // Bitcast i32 -> f32. NEON prefers to use VMOVDRR.
|