Searched refs:BaseMO (Results 1 – 5 of 5) sorted by relevance
123 const MachineOperand &BaseMO = MI->getOperand(OpNum); in PrintAsmMemoryOperand() local125 assert(BaseMO.isReg() && "Unexpected base pointer for inline asm memory operand."); in PrintAsmMemoryOperand()133 O << "(" << BPFInstPrinter::getRegisterName(BaseMO.getReg()) << " - " << -Offset << ")"; in PrintAsmMemoryOperand()135 O << "(" << BPFInstPrinter::getRegisterName(BaseMO.getReg()) << " + " << Offset << ")"; in PrintAsmMemoryOperand()
95 const MachineOperand &BaseMO = MI->getOperand(OpNo); in PrintAsmMemoryOperand() local97 if (!BaseMO.isReg()) in PrintAsmMemoryOperand()100 OS << "$" << LoongArchInstPrinter::getRegisterName(BaseMO.getReg()); in PrintAsmMemoryOperand()
198 hardenLoadAddr(MachineInstr &MI, MachineOperand &BaseMO,1336 MachineOperand &BaseMO = in tracePredStateThroughBlocksAndHarden() local1344 if (!BaseMO.isFI() && BaseMO.getReg() != X86::RIP && in tracePredStateThroughBlocksAndHarden()1345 BaseMO.getReg() != X86::NoRegister) in tracePredStateThroughBlocksAndHarden()1346 BaseReg = BaseMO.getReg(); in tracePredStateThroughBlocksAndHarden()1410 MachineOperand &BaseMO = in tracePredStateThroughBlocksAndHarden() local1414 hardenLoadAddr(MI, BaseMO, IndexMO, AddrRegToHardenedReg); in tracePredStateThroughBlocksAndHarden()1573 MachineInstr &MI, MachineOperand &BaseMO, MachineOperand &IndexMO, in hardenLoadAddr() argument1584 if (BaseMO.isFI()) { in hardenLoadAddr()1590 } else if (BaseMO.getReg() == X86::RSP) { in hardenLoadAddr()[all …]
785 const MachineOperand &BaseMO = in instrUsesRegToAccessMemory() local789 return (BaseMO.isReg() && BaseMO.getReg() != X86::NoRegister && in instrUsesRegToAccessMemory()790 TRI->regsOverlap(BaseMO.getReg(), Reg)) || in instrUsesRegToAccessMemory()
704 const MachineOperand &BaseMO = MI->getOperand(OpNum); in PrintAsmMemoryOperand() local706 assert(BaseMO.isReg() && in PrintAsmMemoryOperand()731 O << Offset << "($" << MipsInstPrinter::getRegisterName(BaseMO.getReg()) in PrintAsmMemoryOperand()