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Searched refs:BaseIndex (Results 1 – 16 of 16) sorted by relevance

/openbsd-src/gnu/usr.bin/binutils/include/opcode/
H A Di386.h1426 …64, Modrm|IgnoreSize|No_bSuf|No_wSuf|No_sSuf|No_qSuf|No_xSuf|NoRex64, { BaseIndex|Disp8|Disp16|Dis…
1427 …64, Modrm|IgnoreSize|No_bSuf|No_wSuf|No_sSuf|No_qSuf|No_xSuf|NoRex64, { BaseIndex|Disp8|Disp16|Dis…
1428 …64, Modrm|IgnoreSize|No_bSuf|No_wSuf|No_sSuf|No_qSuf|No_xSuf|NoRex64, { BaseIndex|Disp8|Disp16|Dis…
1429 …64, Modrm|IgnoreSize|No_bSuf|No_wSuf|No_sSuf|No_qSuf|No_xSuf|NoRex64, { BaseIndex|Disp8|Disp16|Dis…
1431 …m|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_xSuf|NoRex64, { BaseIndex|Disp8|Disp16|Dis…
1434 …m|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_xSuf|NoRex64, { BaseIndex|Disp8|Disp16|Dis…
1435 …m|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_xSuf|NoRex64, { BaseIndex|Disp8|Disp16|Dis…
1436 …|CpuNo64, Modrm|No_bSuf|No_wSuf|No_sSuf|No_qSuf|No_xSuf, { Reg32, Reg32|BaseIndex|Disp8|Disp16|Dis…
1437 …, Modrm|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_xSuf|NoRex64, { Reg64, Reg64|BaseIndex|Disp8|Disp16|Dis…
1438 … CpuVMX|CpuNo64, Modrm|No_bSuf|No_wSuf|No_sSuf|No_qSuf|No_xSuf, { Reg32|BaseIndex|Disp8|Disp16|Dis…
[all …]
H A DChangeLog-91031514 (i386_regtab): Add BaseIndex modifier to valid 16 bit base/index
1519 * i386.h (i386_regtab): Remove BaseIndex modifier from esp.
1541 (i386_regtab): Add BaseIndex to 32 bit regs reg_type.
/openbsd-src/gnu/usr.bin/binutils-2.17/include/opcode/
H A Di386.h1375 …64, Modrm|IgnoreSize|No_bSuf|No_wSuf|No_sSuf|No_qSuf|No_xSuf|NoRex64, { BaseIndex|Disp8|Disp16|Dis…
1376 …64, Modrm|IgnoreSize|No_bSuf|No_wSuf|No_sSuf|No_qSuf|No_xSuf|NoRex64, { BaseIndex|Disp8|Disp16|Dis…
1377 …64, Modrm|IgnoreSize|No_bSuf|No_wSuf|No_sSuf|No_qSuf|No_xSuf|NoRex64, { BaseIndex|Disp8|Disp16|Dis…
1378 …64, Modrm|IgnoreSize|No_bSuf|No_wSuf|No_sSuf|No_qSuf|No_xSuf|NoRex64, { BaseIndex|Disp8|Disp16|Dis…
1534 …64, Modrm|IgnoreSize|No_bSuf|No_wSuf|No_sSuf|No_qSuf|No_xSuf|NoRex64, { BaseIndex|Disp8|Disp16|Dis…
1535 …64, Modrm|IgnoreSize|No_bSuf|No_wSuf|No_sSuf|No_qSuf|No_xSuf|NoRex64, { BaseIndex|Disp8|Disp16|Dis…
1603 {"bx", Reg16|BaseIndex, 0, 3},
1605 {"bp", Reg16|BaseIndex, 0, 5},
1606 {"si", Reg16|BaseIndex, 0, 6},
1607 {"di", Reg16|BaseIndex, 0, 7},
[all …]
H A DChangeLog-91031533 (i386_regtab): Add BaseIndex modifier to valid 16 bit base/index
1538 * i386.h (i386_regtab): Remove BaseIndex modifier from esp.
1560 (i386_regtab): Add BaseIndex to 32 bit regs reg_type.
/openbsd-src/gnu/usr.bin/binutils/gas/config/
H A Dtc-i386.h276 #define BaseIndex 0x800 macro
317 #define AnyMem (Disp8|Disp16|Disp32|Disp32S|BaseIndex|InvMem) /* General memory */
H A Dtc-i386.c1126 { BaseIndex, "BaseIndex" },
1980 && (((given) & (BaseIndex | JumpAbsolute)) \ in match_template()
1981 == ((overlap) & (BaseIndex | JumpAbsolute)))) in match_template()
2773 else if (i.base_reg->reg_type == BaseIndex) in build_modrm_byte()
3834 if ((i.types[this_operand] & BaseIndex) != 0
3972 && (i.base_reg->reg_type != BaseIndex
3975 && ((i.index_reg->reg_type & (RegXX | BaseIndex))
3976 != (RegXX | BaseIndex))))
3985 && ((i.base_reg->reg_type & (Reg16 | BaseIndex | RegRex))
3986 != (Reg16 | BaseIndex)))
[all …]
/openbsd-src/gnu/usr.bin/binutils-2.17/gas/config/
H A Dtc-i386.h266 #define BaseIndex 0x800 macro
307 #define AnyMem (Disp8|Disp16|Disp32|Disp32S|BaseIndex|InvMem) /* General memory */
H A Dtc-i386.c1155 { BaseIndex, "BaseIndex" },
2160 if (!disp && (i.types[op] & BaseIndex)) in optimize_disp()
2204 && (((given) & (BaseIndex | JumpAbsolute)) \ in match_template()
2205 == ((overlap) & (BaseIndex | JumpAbsolute)))) in match_template()
3063 else if (i.base_reg->reg_type == BaseIndex) in build_modrm_byte()
4237 if ((i.types[this_operand] & BaseIndex) != 0
4399 && (i.base_reg->reg_type != BaseIndex
4402 && ((i.index_reg->reg_type & (RegXX | BaseIndex))
4403 != (RegXX | BaseIndex))))
4412 && ((i.base_reg->reg_type & (Reg16 | BaseIndex | RegRex))
[all …]
/openbsd-src/gnu/llvm/llvm/lib/CodeGen/
H A DVirtRegMap.cpp391 SlotIndex BaseIndex = LIS->getInstructionIndex(MI); in readsUndefSubreg() local
394 assert(LI.liveAt(BaseIndex) && in readsUndefSubreg()
401 if ((SR.LaneMask & UseMask).any() && SR.liveAt(BaseIndex)) in readsUndefSubreg()
H A DCodeGenPrepare.cpp6077 Value *BaseIndex = ConstantInt::get(IntPtrTy, BaseOffset); in splitLargeGEPOffsets() local
6082 NewBaseBuilder.CreateGEP(I8Ty, NewBaseGEP, BaseIndex, "splitgep"); in splitLargeGEPOffsets()
/openbsd-src/gnu/llvm/llvm/lib/Transforms/Vectorize/
H A DSLPVectorizer.cpp595 unsigned BaseIndex = 0);
637 unsigned BaseIndex) { in getSameOpcode() argument
640 return InstructionsState(VL[BaseIndex], nullptr, nullptr); in getSameOpcode()
642 bool IsCastOp = isa<CastInst>(VL[BaseIndex]); in getSameOpcode()
643 bool IsBinOp = isa<BinaryOperator>(VL[BaseIndex]); in getSameOpcode()
644 bool IsCmpOp = isa<CmpInst>(VL[BaseIndex]); in getSameOpcode()
646 IsCmpOp ? cast<CmpInst>(VL[BaseIndex])->getPredicate() in getSameOpcode()
648 unsigned Opcode = cast<Instruction>(VL[BaseIndex])->getOpcode(); in getSameOpcode()
650 unsigned AltIndex = BaseIndex; in getSameOpcode()
654 auto *IBase = cast<Instruction>(VL[BaseIndex]); in getSameOpcode()
[all …]
/openbsd-src/gnu/llvm/clang/lib/AST/
H A DMicrosoftMangle.cpp1815 unsigned BaseIndex = 0; in mangleTemplateArgValue() local
1817 mangleTemplateArgValue(B.getType(), V.getStructBase(BaseIndex++)); in mangleTemplateArgValue()
H A DExprConstant.cpp2394 unsigned BaseIndex = 0; in CheckEvaluationResult() local
2397 Value.getStructBase(BaseIndex), Kind, in CheckEvaluationResult()
2400 ++BaseIndex; in CheckEvaluationResult()
/openbsd-src/gnu/llvm/llvm/lib/IR/
H A DVerifier.cpp5341 const uint64_t BaseIndex = cast<ConstantInt>(Base)->getZExtValue(); in visitIntrinsicCall() local
5349 Check(BaseIndex < Opt->Inputs.size(), in visitIntrinsicCall()
/openbsd-src/gnu/usr.bin/binutils-2.17/gas/
H A DChangeLog-00013750 (Imm8, Imm8S, Imm16, Imm32, Imm1, BaseIndex, Disp8, Disp16, Disp32,
/openbsd-src/gnu/usr.bin/binutils/gas/
H A DChangeLog-00013750 (Imm8, Imm8S, Imm16, Imm32, Imm1, BaseIndex, Disp8, Disp16, Disp32,