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Searched refs:ArgDescriptor (Results 1 – 12 of 12) sorted by relevance

/openbsd-src/gnu/llvm/llvm/lib/Target/AMDGPU/
H A DAMDGPUArgumentUsageInfo.h23 struct ArgDescriptor { struct
40 constexpr ArgDescriptor(unsigned Val = 0, unsigned Mask = ~0u, argument
44 static constexpr ArgDescriptor createRegister(Register Reg, argument
46 return ArgDescriptor(Reg, Mask, false, true);
49 static constexpr ArgDescriptor createStack(unsigned Offset,
51 return ArgDescriptor(Offset, Mask, true, true);
54 static constexpr ArgDescriptor createArg(const ArgDescriptor &Arg, in createArg() argument
56 return ArgDescriptor(Arg.Reg, Mask, Arg.IsStack, Arg.IsSet); in createArg()
92 inline raw_ostream &operator<<(raw_ostream &OS, const ArgDescriptor &Arg) { argument
125 ArgDescriptor PrivateSegmentBuffer;
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H A DAMDGPUArgumentUsageInfo.cpp26 void ArgDescriptor::print(raw_ostream &OS, in print()
89 std::tuple<const ArgDescriptor *, const TargetRegisterClass *, LLT>
154 = ArgDescriptor::createRegister(AMDGPU::SGPR0_SGPR1_SGPR2_SGPR3); in fixedABILayout()
155 AI.DispatchPtr = ArgDescriptor::createRegister(AMDGPU::SGPR4_SGPR5); in fixedABILayout()
156 AI.QueuePtr = ArgDescriptor::createRegister(AMDGPU::SGPR6_SGPR7); in fixedABILayout()
160 AI.ImplicitArgPtr = ArgDescriptor::createRegister(AMDGPU::SGPR8_SGPR9); in fixedABILayout()
161 AI.DispatchID = ArgDescriptor::createRegister(AMDGPU::SGPR10_SGPR11); in fixedABILayout()
164 AI.WorkGroupIDX = ArgDescriptor::createRegister(AMDGPU::SGPR12); in fixedABILayout()
165 AI.WorkGroupIDY = ArgDescriptor::createRegister(AMDGPU::SGPR13); in fixedABILayout()
166 AI.WorkGroupIDZ = ArgDescriptor::createRegister(AMDGPU::SGPR14); in fixedABILayout()
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H A DSIMachineFunctionInfo.cpp100 ArgDescriptor::createRegister(ScratchRSrcReg); in SIMachineFunctionInfo()
183 ArgDescriptor::createRegister(AMDGPU::SGPR5); in SIMachineFunctionInfo()
223 ArgDescriptor::createRegister(TRI.getMatchingSuperReg( in addPrivateSegmentBuffer()
230 ArgInfo.DispatchPtr = ArgDescriptor::createRegister(TRI.getMatchingSuperReg( in addDispatchPtr()
237 ArgInfo.QueuePtr = ArgDescriptor::createRegister(TRI.getMatchingSuperReg( in addQueuePtr()
245 = ArgDescriptor::createRegister(TRI.getMatchingSuperReg( in addKernargSegmentPtr()
252 ArgInfo.DispatchID = ArgDescriptor::createRegister(TRI.getMatchingSuperReg( in addDispatchID()
259 ArgInfo.FlatScratchInit = ArgDescriptor::createRegister(TRI.getMatchingSuperReg( in addFlatScratchInit()
266 ArgInfo.ImplicitBufferPtr = ArgDescriptor::createRegister(TRI.getMatchingSuperReg( in addImplicitBufferPtr()
273 ArgInfo.LDSKernelId = ArgDescriptor::createRegister(getNextUserSGPR()); in addLDSKernelId()
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H A DSIMachineFunctionInfo.h697 ArgInfo.WorkGroupIDX = ArgDescriptor::createRegister(getNextSystemSGPR());
703 ArgInfo.WorkGroupIDY = ArgDescriptor::createRegister(getNextSystemSGPR());
709 ArgInfo.WorkGroupIDZ = ArgDescriptor::createRegister(getNextSystemSGPR());
715 ArgInfo.WorkGroupInfo = ArgDescriptor::createRegister(getNextSystemSGPR());
721 void setWorkItemIDX(ArgDescriptor Arg) {
725 void setWorkItemIDY(ArgDescriptor Arg) {
729 void setWorkItemIDZ(ArgDescriptor Arg) {
735 = ArgDescriptor::createRegister(getNextSystemSGPR());
741 ArgInfo.PrivateSegmentWaveByteOffset = ArgDescriptor::createRegister(Reg);
818 std::tuple<const ArgDescriptor *, const TargetRegisterClass *, LLT>
H A DAMDGPUCallLowering.cpp801 const ArgDescriptor *OutgoingArg; in passSpecialInputs()
814 const ArgDescriptor *IncomingArg; in passSpecialInputs()
852 const ArgDescriptor *OutgoingArg; in passSpecialInputs()
874 const ArgDescriptor *IncomingArgX = std::get<0>(WorkitemIDX); in passSpecialInputs()
875 const ArgDescriptor *IncomingArgY = std::get<0>(WorkitemIDY); in passSpecialInputs()
876 const ArgDescriptor *IncomingArgZ = std::get<0>(WorkitemIDZ); in passSpecialInputs()
929 ArgDescriptor IncomingArg = ArgDescriptor::createArg( in passSpecialInputs()
H A DAMDGPUISelLowering.h25 struct ArgDescriptor;
323 const ArgDescriptor &Arg) const;
H A DAMDGPUTargetMachine.cpp1510 ArgDescriptor &Arg, unsigned UserSGPRs, in parseMachineFunctionInfo()
1524 Arg = ArgDescriptor::createRegister(Reg); in parseMachineFunctionInfo()
1526 Arg = ArgDescriptor::createStack(A->StackOffset); in parseMachineFunctionInfo()
1529 Arg = ArgDescriptor::createArg(Arg, *A->Mask); in parseMachineFunctionInfo()
H A DAMDGPULegalizerInfo.h99 const ArgDescriptor *Arg,
H A DSIISelLowering.cpp1684 const ArgDescriptor *InputPtrReg; in lowerKernArgParameterPtr()
1849 const ArgDescriptor *Reg; in getPreloadedValue()
1933 Info.setWorkItemIDX(ArgDescriptor::createRegister(Reg, Mask)); in allocateSpecialEntryInputVGPRs()
1939 Info.setWorkItemIDY(ArgDescriptor::createRegister(AMDGPU::VGPR0, in allocateSpecialEntryInputVGPRs()
1946 Info.setWorkItemIDY(ArgDescriptor::createRegister(Reg)); in allocateSpecialEntryInputVGPRs()
1953 Info.setWorkItemIDZ(ArgDescriptor::createRegister(AMDGPU::VGPR0, in allocateSpecialEntryInputVGPRs()
1960 Info.setWorkItemIDZ(ArgDescriptor::createRegister(Reg)); in allocateSpecialEntryInputVGPRs()
1969 static ArgDescriptor allocateVGPR32Input(CCState &CCInfo, unsigned Mask = ~0u, in allocateVGPR32Input()
1970 ArgDescriptor Arg = ArgDescriptor()) { in allocateVGPR32Input()
1972 return ArgDescriptor::createArg(Arg, Mask); in allocateVGPR32Input()
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H A DSIISelLowering.h84 const ArgDescriptor &ArgDesc) const;
H A DAMDGPULegalizerInfo.cpp3249 const ArgDescriptor *Arg, in loadInputValue()
3285 const ArgDescriptor *Arg; in loadInputValue()
3334 const ArgDescriptor *Arg; in legalizeWorkitemIDIntrinsic()
H A DAMDGPUISelLowering.cpp4357 const ArgDescriptor &Arg) const { in loadInputValue()