Searched refs:AddrNumOperands (Results 1 – 13 of 13) sorted by relevance
812 CurOp += X86::AddrNumOperands; in emitVEXOpcodePrefix()840 CurOp += X86::AddrNumOperands; in emitVEXOpcodePrefix()901 VEX_4V = ~getX86RegEncoding(MI, CurOp + X86::AddrNumOperands) & 0xf; in emitVEXOpcodePrefix()1193 CurOp += X86::AddrNumOperands; in emitREXPrefix()1202 CurOp += X86::AddrNumOperands; in emitREXPrefix()1452 unsigned SrcRegNum = CurOp + X86::AddrNumOperands; in encodeInstruction()1461 unsigned SrcRegNum = CurOp + X86::AddrNumOperands; in encodeInstruction()1547 CurOp = FirstMemOp + X86::AddrNumOperands; in encodeInstruction()1559 CurOp = FirstMemOp + X86::AddrNumOperands; in encodeInstruction()1576 CurOp = FirstMemOp + X86::AddrNumOperands; in encodeInstruction()[all …]
41 AddrNumOperands = 5 enumerator
280 MachineOperand &StackAdjust = MBBI->getOperand(isMem ? X86::AddrNumOperands in ExpandMI()346 for (unsigned i = 0; i != X86::AddrNumOperands; ++i) in ExpandMI()474 for (int i = 0; i < X86::AddrNumOperands; ++i) { in ExpandMI()498 Register Reg = MBBI->getOperand(X86::AddrNumOperands).getReg(); in ExpandMI()499 bool SrcIsKill = MBBI->getOperand(X86::AddrNumOperands).isKill(); in ExpandMI()506 for (int i = 0; i < X86::AddrNumOperands; ++i) { in ExpandMI()672 for (int i = 0; i < X86::AddrNumOperands; ++i) { in ExpandVastartSaveXmmRegs()
291 const MachineOperand &ImmOp = MI->getOperand(X86::AddrNumOperands); in classifyInstruction()297 const MachineOperand &ImmOp = MI->getOperand(X86::AddrNumOperands); in classifyInstruction()509 const MachineOperand &PushOp = Store->getOperand(X86::AddrNumOperands); in adjustCallSequence()564 for (unsigned i = NumOps - X86::AddrNumOperands; i != NumOps; ++i) in adjustCallSequence()
512 assert(OutMI.getNumOperands() == 1 + X86::AddrNumOperands && in Lower()821 assert(OutMI.getNumOperands() == X86::AddrNumOperands && in Lower()2132 assert(MI->getNumOperands() >= (SrcIdx + 1 + X86::AddrNumOperands) && in addConstantComments()2210 assert(MI->getNumOperands() >= (SrcIdx + 1 + X86::AddrNumOperands) && in addConstantComments()2228 assert(MI->getNumOperands() >= (3 + X86::AddrNumOperands + 1) && in addConstantComments()2254 assert(MI->getNumOperands() >= (3 + X86::AddrNumOperands) && in addConstantComments()2269 assert(MI->getNumOperands() == (1 + X86::AddrNumOperands) && in addConstantComments()2329 assert(MI->getNumOperands() >= (1 + X86::AddrNumOperands) && in addConstantComments()2421 assert(MI->getNumOperands() >= (1 + X86::AddrNumOperands) && in addConstantComments()
535 MemOpEnd = MemOpStart + X86::AddrNumOperands; in usedAsAddr()570 OpIdx += (X86::AddrNumOperands - 1); in buildClosure()
425 MachineOperand &StoreSrcVReg = StoreInst->getOperand(X86::AddrNumOperands); in buildCopy()427 NewStore->getOperand(X86::AddrNumOperands).setIsKill(StoreSrcVReg.isKill()); in buildCopy()
134 return Op + X86::AddrNumOperands <= MI.getNumOperands() && in isMem()
703 if (MI.getOperand(X86::AddrNumOperands).getSubReg() == 0 && in isStoreToStackSlot()705 return MI.getOperand(X86::AddrNumOperands).getReg(); in isStoreToStackSlot()722 return MI.getOperand(X86::AddrNumOperands).getReg(); in isStoreToStackSlotPostFE()4892 Register SrcReg = MIB.getReg(X86::AddrNumOperands); in expandNOVLXStore()4902 MIB->getOperand(X86::AddrNumOperands).setReg(SrcReg); in expandNOVLXStore()6123 if (MOs.size() == X86::AddrNumOperands && in foldMemoryOperandImpl()6711 SmallVector<MachineOperand,X86::AddrNumOperands> MOs; in foldMemoryOperandImpl()6799 MOs.append(LoadMI.operands_begin() + NumOps - X86::AddrNumOperands, in foldMemoryOperandImpl()6924 SmallVector<MachineOperand, X86::AddrNumOperands> AddrOps; in unfoldMemoryOperand()6930 if (i >= Index && i < Index + X86::AddrNumOperands) in unfoldMemoryOperand()[all …]
980 for (int i = 0; i < X86::AddrNumOperands; ++i) in rewriteSetCC()
1181 assert((NumOps == X86::AddrNumOperands + 1 || NumOps == 1) && in handleOneArgFP()
35308 static_assert(X86::AddrNumOperands == 5, "VAARG assumes 5 address operands"); in EmitVAARGWithCustomInserter()36520 for (unsigned i = 0; i < X86::AddrNumOperands; ++i) { in emitSetJmpShadowStackFix()36628 for (unsigned i = 0; i < X86::AddrNumOperands; ++i) { in emitEHSjLjSetJmp()36786 for (unsigned i = 0; i < X86::AddrNumOperands; ++i) { in emitLongJmpShadowStackFix()36912 for (unsigned i = 0; i < X86::AddrNumOperands; ++i) { in emitEHSjLjLongJmp()36924 for (unsigned i = 0; i < X86::AddrNumOperands; ++i) { in emitEHSjLjLongJmp()36938 for (unsigned i = 0; i < X86::AddrNumOperands; ++i) { in emitEHSjLjLongJmp()37453 .addReg(MI.getOperand(X86::AddrNumOperands).getReg()); in EmitInstrWithCustomInserter()37563 for (unsigned Idx = 0; Idx < X86::AddrNumOperands; ++Idx) in EmitInstrWithCustomInserter()37565 MIB.add(MI.getOperand(X86::AddrNumOperands)); in EmitInstrWithCustomInserter()[all …]
3778 if (!Inst.getOperand(X86::AddrNumOperands).isImm() || in processInstruction()3779 Inst.getOperand(X86::AddrNumOperands).getImm() != 1) in processInstruction()3817 for (int i = 0; i != X86::AddrNumOperands; ++i) in processInstruction()3865 X86::AddrNumOperands - 1).getReg(); in validateInstruction()