Home
last modified time | relevance | path

Searched refs:AddrBaseReg (Results 1 – 18 of 18) sorted by relevance

/openbsd-src/gnu/llvm/llvm/lib/Target/X86/
H A DX86InsertPrefetch.cpp83 Register BaseReg = MI.getOperand(Op + X86::AddrBaseReg).getReg(); in IsMemOpCompatibleWithPrefetch()
218 static_assert(X86::AddrBaseReg == 0 && X86::AddrScaleAmt == 1 && in runOnMachineFunction()
226 MIB.addReg(Current->getOperand(MemOpOffset + X86::AddrBaseReg).getReg()) in runOnMachineFunction()
H A DX86OptimizeLEAs.cpp194 return MemOpKey(&MI.getOperand(N + X86::AddrBaseReg), in getMemOpKey()
364 if (TII->getRegClass(Desc, MemOpNo + X86::AddrBaseReg, TRI, *MF) != in chooseBestLEA()
459 if (!isIdenticalOp(MI.getOperand(MemOpNo + X86::AddrBaseReg), MO)) in isReplaceable()
465 if (i != (unsigned)(MemOpNo + X86::AddrBaseReg) && in isReplaceable()
558 MI.getOperand(MemOpNo + X86::AddrBaseReg) in removeRedundantAddrCalc()
H A DX86FixupLEAs.cpp462 Register BaseReg = LeaI->getOperand(1 + X86::AddrBaseReg).getReg(); in checkRegUsage()
514 Register BaseReg = I->getOperand(1 + X86::AddrBaseReg).getReg(); in optLEAALU()
561 const MachineOperand &Base = MI.getOperand(1 + X86::AddrBaseReg); in optTwoAddrLEA()
664 MachineOperand &p = MI.getOperand(AddrOffset + X86::AddrBaseReg); in processInstruction()
701 const MachineOperand &Base = MI.getOperand(1 + X86::AddrBaseReg); in processInstructionForSlowLEA()
753 const MachineOperand &Base = MI.getOperand(1 + X86::AddrBaseReg); in processInstrForSlow3OpLEA()
H A DX86AsmPrinter.cpp375 const MachineOperand &BaseReg = MI->getOperand(OpNo + X86::AddrBaseReg); in PrintLeaMemReference()
412 PrintModifiedOperand(MI, OpNo + X86::AddrBaseReg, O, Modifier); in PrintLeaMemReference()
471 const MachineOperand &BaseReg = MI->getOperand(OpNo + X86::AddrBaseReg); in PrintIntelMemReference()
499 PrintOperand(MI, OpNo + X86::AddrBaseReg, O); in PrintIntelMemReference()
H A DX86CallFrameOptimization.cpp427 if (!I->getOperand(X86::AddrBaseReg).isReg() || in collectCallInfo()
428 (I->getOperand(X86::AddrBaseReg).getReg() != StackPtr) || in collectCallInfo()
H A DX86FixupGadgets.cpp158 const MachineOperand &Base = MI.getOperand(CurOp + X86::AddrBaseReg); in checkSIB()
169 info.op1 = CurOp + X86::AddrBaseReg; in checkSIB()
H A DX86SpeculativeLoadHardening.cpp1337 MI.getOperand(MemRefBeginIdx + X86::AddrBaseReg); in tracePredStateThroughBlocksAndHarden()
1411 MI.getOperand(MemRefBeginIdx + X86::AddrBaseReg); in tracePredStateThroughBlocksAndHarden()
1813 UseMI.getOperand(MemRefBeginIdx + X86::AddrBaseReg); in sinkPostLoadHardenedInst()
H A DX86InstrInfo.h122 MI.getOperand(Op + X86::AddrBaseReg).isReg() && in isLeaMem()
H A DX86AvoidStoreForwardingBlocks.cpp301 return MI->getOperand(AddrOffset + X86::AddrBaseReg); in getBaseOperand()
H A DX86LoadValueInjectionLoadHardening.cpp786 MI.getOperand(MemRefBeginIdx + X86::AddrBaseReg); in instrUsesRegToAccessMemory()
H A DX86InstrInfo.cpp455 if (MI.getOperand(Op + X86::AddrBaseReg).isFI() && in isFrameOperand()
462 FrameIndex = MI.getOperand(Op + X86::AddrBaseReg).getIndex(); in isFrameOperand()
868 if (MI.getOperand(1 + X86::AddrBaseReg).isReg() && in isReallyTriviallyReMaterializable()
873 Register BaseReg = MI.getOperand(1 + X86::AddrBaseReg).getReg(); in isReallyTriviallyReMaterializable()
893 if (!MI.getOperand(1 + X86::AddrBaseReg).isReg()) in isReallyTriviallyReMaterializable()
895 Register BaseReg = MI.getOperand(1 + X86::AddrBaseReg).getReg(); in isReallyTriviallyReMaterializable()
3741 auto &BaseOp = MemI.getOperand(MemRefBegin + X86::AddrBaseReg); in getAddrModeFromMemoryOp()
3839 &MemOp.getOperand(MemRefBegin + X86::AddrBaseReg); in getMemOperandsWithOffsetWidth()
7369 if (!HasSameOp(X86::AddrBaseReg) || !HasSameOp(X86::AddrScaleAmt) || in areLoadsFromSameBasePtr()
H A DX86MCInstLower.cpp388 Inst.getOperand(AddrBase + X86::AddrBaseReg).isReg() && in SimplifyShortMoveForm()
412 (Inst.getOperand(AddrBase + X86::AddrBaseReg).getReg() != 0 || in SimplifyShortMoveForm()
/openbsd-src/gnu/llvm/llvm/lib/Target/X86/MCTargetDesc/
H A DX86MCCodeEmitter.cpp328 const MCOperand &Base = MI.getOperand(Op + X86::AddrBaseReg); in emitMemModRMByte()
806 unsigned BaseRegEnc = getX86RegEncoding(MI, MemOperand + X86::AddrBaseReg); in emitVEXOpcodePrefix()
832 unsigned BaseRegEnc = getX86RegEncoding(MI, MemOperand + X86::AddrBaseReg); in emitVEXOpcodePrefix()
879 unsigned BaseRegEnc = getX86RegEncoding(MI, MemOperand + X86::AddrBaseReg); in emitVEXOpcodePrefix()
895 unsigned BaseRegEnc = getX86RegEncoding(MI, MemOperand + X86::AddrBaseReg); in emitVEXOpcodePrefix()
912 unsigned BaseRegEnc = getX86RegEncoding(MI, MemOperand + X86::AddrBaseReg); in emitVEXOpcodePrefix()
939 unsigned BaseRegEnc = getX86RegEncoding(MI, MemOperand + X86::AddrBaseReg); in emitVEXOpcodePrefix()
1191 REX |= isREXExtendedReg(MI, MemOperand + X86::AddrBaseReg) << 0; // REX.B in emitREXPrefix()
1200 REX |= isREXExtendedReg(MI, MemOperand + X86::AddrBaseReg) << 0; // REX.B in emitREXPrefix()
1215 REX |= isREXExtendedReg(MI, MemOperand + X86::AddrBaseReg) << 0; // REX.B in emitREXPrefix()
H A DX86MCTargetDesc.cpp78 const MCOperand &Base = MI.getOperand(Op + X86::AddrBaseReg); in isMemOperand()
88 const MCOperand &Base = MI.getOperand(Op + X86::AddrBaseReg); in is16BitMemOperand()
98 const MCOperand &Base = MI.getOperand(Op + X86::AddrBaseReg); in is32BitMemOperand()
650 const MCOperand &BaseReg = Inst.getOperand(MemOpStart + X86::AddrBaseReg); in evaluateMemoryOperandAddress()
676 const MCOperand &BaseReg = Inst.getOperand(MemOpStart + X86::AddrBaseReg); in getMemoryOperandRelocationOffset()
H A DX86IntelInstPrinter.cpp383 const MCOperand &BaseReg = MI->getOperand(Op+X86::AddrBaseReg); in printMemReference()
395 printOperand(MI, Op+X86::AddrBaseReg, O); in printMemReference()
H A DX86ATTInstPrinter.cpp426 const MCOperand &BaseReg = MI->getOperand(Op + X86::AddrBaseReg); in printMemReference()
447 printOperand(MI, Op + X86::AddrBaseReg, O); in printMemReference()
H A DX86AsmBackend.cpp265 unsigned BaseRegNum = MemoryOperand + CurOp + X86::AddrBaseReg; in isRIPRelative()
341 unsigned BaseRegNum = MemoryOperand + X86::AddrBaseReg; in determinePaddingPrefix()
H A DX86BaseInfo.h32 AddrBaseReg = 0, enumerator