Home
last modified time | relevance | path

Searched refs:AddRegFrm (Results 1 – 10 of 10) sorted by relevance

/openbsd-src/gnu/llvm/llvm/utils/TableGen/
H A DX86RecognizableInstr.h100 AddRegFrm = 2, enumerator
H A DX86RecognizableInstr.cpp512 case X86Local::AddRegFrm: in emitInstructionSpecifier()
802 case X86Local::AddRegFrm: in emitDecodePath()
872 if (Form == X86Local::AddRegFrm || Form == X86Local::MRMSrcRegCC || in emitDecodePath()
876 uint8_t Count = Form == X86Local::AddRegFrm ? 8 : 16; in emitDecodePath()
/openbsd-src/gnu/llvm/llvm/lib/Target/X86/MCTargetDesc/
H A DX86BaseInfo.h595 AddRegFrm = 2, enumerator
1108 case X86II::AddRegFrm: in getMemoryOperandNo()
H A DX86MCCodeEmitter.cpp1180 case X86II::AddRegFrm: in emitREXPrefix()
1430 case X86II::AddRegFrm: in encodeInstruction()
/openbsd-src/gnu/llvm/llvm/lib/Target/X86/
H A DX86InstrInfo.td1330 def POP16r : I<0x58, AddRegFrm, (outs GR16:$reg), (ins), "pop{w}\t$reg", []>,
1332 def POP32r : I<0x58, AddRegFrm, (outs GR32:$reg), (ins), "pop{l}\t$reg", []>,
1350 def PUSH16r : I<0x50, AddRegFrm, (outs), (ins GR16:$reg), "push{w}\t$reg",[]>,
1352 def PUSH32r : I<0x50, AddRegFrm, (outs), (ins GR32:$reg), "push{l}\t$reg",[]>,
1426 def POP64r : I<0x58, AddRegFrm, (outs GR64:$reg), (ins), "pop{q}\t$reg", []>,
1438 def PUSH64r : I<0x50, AddRegFrm, (outs), (ins GR64:$reg), "push{q}\t$reg", []>,
1488 def BSWAP16r_BAD : I<0xC8, AddRegFrm, (outs GR16:$dst), (ins GR16:$src),
1491 def BSWAP32r : I<0xC8, AddRegFrm, (outs GR32:$dst), (ins GR32:$src),
1496 def BSWAP64r : RI<0xC8, AddRegFrm, (outs GR64:$dst), (ins GR64:$src),
1624 def MOV8ri : Ii8 <0xB0, AddRegFrm, (outs GR8 :$dst), (ins i8imm :$src),
[all …]
H A DX86FixupGadgets.cpp215 case X86II::AddRegFrm: { in isROPFriendly()
H A DX86InstrArithmetic.td459 def INC16r_alt : I<0x40, AddRegFrm, (outs GR16:$dst), (ins GR16:$src1),
462 def INC32r_alt : I<0x40, AddRegFrm, (outs GR32:$dst), (ins GR32:$src1),
506 def DEC16r_alt : I<0x48, AddRegFrm, (outs GR16:$dst), (ins GR16:$src1),
509 def DEC32r_alt : I<0x48, AddRegFrm, (outs GR32:$dst), (ins GR32:$src1),
H A DX86InstrFormats.td22 def AddRegFrm : Format<2>;
/openbsd-src/gnu/llvm/llvm/tools/llvm-exegesis/lib/X86/
H A DTarget.cpp162 case X86II::AddRegFrm: in isInvalidMemoryInstr()
/openbsd-src/gnu/llvm/llvm/docs/
H A DWritingAnLLVMBackend.rst1887 case X86II::AddRegFrm: // for instructions that have one register operand
1922 for the ``X86II::AddRegFrm`` case, the first data emitted (by ``emitByte``) is
1933 case X86II::AddRegFrm: