| /openbsd-src/gnu/llvm/llvm/include/llvm/CodeGen/ |
| H A D | ISDOpcodes.h | 1186 ATOMIC_SWAP, enumerator
|
| H A D | SelectionDAGNodes.h | 1406 case ISD::ATOMIC_SWAP:
1475 N->getOpcode() == ISD::ATOMIC_SWAP ||
|
| /openbsd-src/gnu/llvm/llvm/lib/CodeGen/ |
| H A D | TargetLoweringBase.cpp | 551 case ISD::ATOMIC_SWAP: { in getOUTLINE_ATOMIC()
597 OP_TO_LIBCALL(ISD::ATOMIC_SWAP, SYNC_LOCK_TEST_AND_SET) in getSYNC()
780 setOperationAction(ISD::ATOMIC_SWAP, VT, Promote); in initActions()
781 AddPromotedToType(ISD::ATOMIC_SWAP, VT, IntVT); in initActions()
|
| /openbsd-src/gnu/llvm/llvm/lib/Target/BPF/ |
| H A D | BPFISelLowering.cpp | 95 setOperationAction(ISD::ATOMIC_SWAP, VT, Custom); in BPFTargetLowering()
269 case ISD::ATOMIC_SWAP: in ReplaceNodeResults()
|
| /openbsd-src/gnu/llvm/llvm/lib/Target/Mips/ |
| H A D | Mips16ISelLowering.cpp | 132 setOperationAction(ISD::ATOMIC_SWAP, MVT::i32, Expand); in Mips16TargetLowering()
|
| H A D | MipsInstrInfo.td | 1807 // Atomic instructions with 2 source operands (ATOMIC_SWAP & ATOMIC_LOAD_*).
|
| /openbsd-src/gnu/llvm/llvm/lib/Target/VE/ |
| H A D | VEISelLowering.cpp | 276 setOperationAction(ISD::ATOMIC_SWAP, VT, Custom); in initSPUActions()
1881 case ISD::ATOMIC_SWAP: in LowerOperation()
1958 case ISD::ATOMIC_SWAP: in ReplaceNodeResults()
2921 case ISD::ATOMIC_SWAP: in isI32Insn()
|
| /openbsd-src/gnu/llvm/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | SelectionDAGDumper.cpp | 86 case ISD::ATOMIC_SWAP: return "AtomicSwap"; in getOperationName()
|
| H A D | LegalizeFloatTypes.cpp | 131 case ISD::ATOMIC_SWAP: R = BitcastToInt_ATOMIC_SWAP(N); break; in SoftenFloatResult()
2302 case ISD::ATOMIC_SWAP: R = BitcastToInt_ATOMIC_SWAP(N); break; in PromoteFloatResult()
2569 = DAG.getAtomic(ISD::ATOMIC_SWAP, SL, CastVT, in BitcastToInt_ATOMIC_SWAP()
2666 case ISD::ATOMIC_SWAP: R = BitcastToInt_ATOMIC_SWAP(N); break; in SoftPromoteHalfResult()
|
| H A D | LegalizeDAG.cpp | 2784 SDValue Swap = DAG.getAtomic(ISD::ATOMIC_SWAP, dl, in ExpandNode()
3972 case ISD::ATOMIC_SWAP: in ConvertNodeToLibcall()
5067 case ISD::ATOMIC_SWAP: { in PromoteNode()
5077 = DAG.getAtomic(ISD::ATOMIC_SWAP, SL, NVT, in PromoteNode()
|
| H A D | LegalizeIntegerTypes.cpp | 233 case ISD::ATOMIC_SWAP: in PromoteIntegerResult()
2470 case ISD::ATOMIC_SWAP: in ExpandIntegerResult()
5149 SDValue Swap = DAG.getAtomic(ISD::ATOMIC_SWAP, dl, in ExpandIntOp_STORE()
5267 SDValue Swap = DAG.getAtomic(ISD::ATOMIC_SWAP, dl, in ExpandIntOp_ATOMIC_STORE()
|
| H A D | SelectionDAG.cpp | 848 case ISD::ATOMIC_SWAP: in AddNodeIDCustom()
3851 case ISD::ATOMIC_SWAP: in computeKnownBits()
4521 case ISD::ATOMIC_SWAP: in ComputeNumSignBits()
7816 Opcode == ISD::ATOMIC_SWAP || in getAtomic()
|
| H A D | SelectionDAGBuilder.cpp | 4659 case AtomicRMWInst::Xchg: NT = ISD::ATOMIC_SWAP; break; in visitAtomicRMW()
|
| /openbsd-src/gnu/llvm/llvm/docs/ |
| H A D | Atomics.rst | 604 ISelLowering code has set the corresponding ``ATOMIC_CMPXCHG``, ``ATOMIC_SWAP``,
|
| /openbsd-src/gnu/llvm/llvm/lib/Target/Sparc/ |
| H A D | SparcISelLowering.cpp | 1733 setOperationAction(ISD::ATOMIC_SWAP, MVT::i32, Legal); in SparcTargetLowering()
1743 setOperationAction(ISD::ATOMIC_SWAP, MVT::i64, Legal); in SparcTargetLowering()
|
| /openbsd-src/gnu/llvm/llvm/lib/Target/AVR/ |
| H A D | AVRISelLowering.cpp | 141 setOperationAction(ISD::ATOMIC_SWAP, VT, Expand); in AVRTargetLowering()
|
| /openbsd-src/gnu/llvm/llvm/include/llvm/Target/ |
| H A D | TargetSelectionDAG.td | 640 def atomic_swap : SDNode<"ISD::ATOMIC_SWAP", SDTAtomic2,
|
| /openbsd-src/gnu/llvm/llvm/include/llvm/IR/ |
| H A D | IntrinsicsAMDGPU.td | 967 defm int_amdgcn_image_atomic_swap : AMDGPUImageDimAtomic<"ATOMIC_SWAP">;
|
| /openbsd-src/gnu/llvm/llvm/lib/Target/X86/ |
| H A D | X86InstrInfo.td | 2103 multiclass ATOMIC_SWAP<bits<8> opc8, bits<8> opc, string mnemonic, string frag> {
2134 defm XCHG : ATOMIC_SWAP<0x86, 0x87, "xchg", "atomic_swap">, NotMemoryFoldable;
|
| /openbsd-src/gnu/llvm/llvm/lib/Target/SystemZ/ |
| H A D | SystemZISelLowering.cpp | 240 setOperationAction(ISD::ATOMIC_SWAP, MVT::i32, Custom); in SystemZTargetLowering()
5751 case ISD::ATOMIC_SWAP: in LowerOperation()
|
| H A D | SystemZInstrFormats.td | 5146 // OPERATOR is ATOMIC_SWAP or an ATOMIC_LOAD_* operation. PAT and OPERAND
|
| /openbsd-src/gnu/llvm/llvm/lib/Target/AArch64/ |
| H A D | AArch64ISelLowering.cpp | 781 setOperationAction(ISD::ATOMIC_SWAP, MVT::i8, LibCall); in AArch64TargetLowering()
782 setOperationAction(ISD::ATOMIC_SWAP, MVT::i16, LibCall); in AArch64TargetLowering()
783 setOperationAction(ISD::ATOMIC_SWAP, MVT::i32, LibCall); in AArch64TargetLowering()
784 setOperationAction(ISD::ATOMIC_SWAP, MVT::i64, LibCall); in AArch64TargetLowering()
|
| /openbsd-src/gnu/llvm/llvm/lib/Target/AMDGPU/ |
| H A D | SIISelLowering.cpp | 782 ISD::ATOMIC_SWAP, in SITargetLowering()
|
| /openbsd-src/gnu/llvm/llvm/lib/Target/RISCV/ |
| H A D | RISCVISelLowering.cpp | 990 {ISD::ATOMIC_CMP_SWAP, ISD::ATOMIC_SWAP, ISD::ATOMIC_LOAD_ADD, in RISCVTargetLowering()
|
| /openbsd-src/gnu/llvm/llvm/lib/Target/ARM/ |
| H A D | ARMISelLowering.cpp | 1341 setOperationAction(ISD::ATOMIC_SWAP, MVT::i32, Expand); in ARMTargetLowering()
|