| /openbsd-src/gnu/llvm/llvm/lib/Target/Lanai/ |
| H A D | LanaiAluCode.h | 24 ADDC = 0x01, enumerator
80 case ADDC: in lanaiAluCodeToString()
106 .Case("addc", ADDC) in stringToLanaiAluCode()
123 return AluCode::ADDC; in isdToLanaiAluCode()
|
| /openbsd-src/lib/libedit/ |
| H A D | keymacro.c | 618 #define ADDC(c) \ macro
635 ADDC(sep[0]); in keymacro__decode_str()
638 ADDC('^'); in keymacro__decode_str()
639 ADDC('@'); in keymacro__decode_str()
656 ADDC(sep[1]); in keymacro__decode_str()
658 ADDC('\0'); in keymacro__decode_str()
|
| /openbsd-src/sys/lib/libkern/arch/hppa/ |
| H A D | milli.S | 649 ADDC ret1,0,ret1
656 ADDC ret1,0,ret1
661 ADDC 0,0,ret1
665 ADDC ret1,t1,ret1
673 ADDC 0,0,ret1
681 ADDC ret1,0,ret1
686 ADDC 0,0,ret1
690 ADDC t1,ret1,ret1
699 ADDC 0,0,ret1
707 ADDC ret1,0,ret1
[all …]
|
| /openbsd-src/gnu/usr.bin/binutils-2.17/include/opcode/ |
| H A D | m88k.h | 254 #define ADDC 2 macro
|
| /openbsd-src/gnu/usr.bin/binutils/include/opcode/ |
| H A D | m88k.h | 253 #define ADDC 2 macro
|
| /openbsd-src/gnu/llvm/llvm/include/llvm/CodeGen/ |
| H A D | ISDOpcodes.h | 269 ADDC, enumerator
|
| /openbsd-src/gnu/llvm/llvm/lib/Target/M68k/ |
| H A D | M68kISelDAGToDAG.cpp | 737 case ISD::ADDC: in isAddressBase()
|
| H A D | M68kISelLowering.cpp | 109 setOperationAction(ISD::ADDC, VT, Custom); in M68kTargetLowering()
1369 case ISD::ADDC: in LowerOperation()
2499 case ISD::ADDC: in LowerADDC_ADDE_SUBC_SUBE()
|
| /openbsd-src/sys/arch/hppa/hppa/ |
| H A D | db_disasm.c | 568 #define ADDC 0x02, 0x38, 20, 7 /* ADD with CARRY */ macro
1050 { ADDC, 0, "addc", ariDasm },
|
| /openbsd-src/gnu/llvm/llvm/lib/Target/ARM/ |
| H A D | ARMISelLowering.h | 109 ADDC, // Add with carry enumerator
|
| /openbsd-src/gnu/llvm/llvm/lib/Target/Hexagon/ |
| H A D | HexagonISelLowering.h | 39 ADDC, // Add with carry: (X, Y, Cin) -> (X+Y, Cout). enumerator
|
| H A D | HexagonISelDAGToDAG.cpp | 787 unsigned OpcCarry = N->getOpcode() == HexagonISD::ADDC ? Hexagon::A4_addp_c in SelectAddSubCarry()
944 case HexagonISD::ADDC: in Select()
|
| H A D | HexagonISelLowering.cpp | 1883 case HexagonISD::ADDC: return "HexagonISD::ADDC"; in getTargetNodeName()
3276 return DAG.getNode(HexagonISD::ADDC, dl, Op.getNode()->getVTList(), in LowerAddSubCarry()
|
| /openbsd-src/gnu/llvm/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | SelectionDAGDumper.cpp | 308 case ISD::ADDC: return "addc"; in getOperationName()
|
| H A D | LegalizeIntegerTypes.cpp | 2509 case ISD::ADDC: in ExpandIntegerResult()
2961 ISD::ADDC : ISD::SUBC, in ExpandIntRes_ADDSUB()
2967 Lo = DAG.getNode(ISD::ADDC, dl, VTList, LoOps); in ExpandIntRes_ADDSUB()
3057 if (N->getOpcode() == ISD::ADDC) { in ExpandIntRes_ADDSUBC()
3058 Lo = DAG.getNode(ISD::ADDC, dl, VTList, LoOps); in ExpandIntRes_ADDSUBC()
|
| /openbsd-src/gnu/llvm/llvm/lib/Target/AMDGPU/ |
| H A D | AMDGPUISelDAGToDAG.cpp | 521 case ISD::ADDC: in Select()
825 ConsumeCarry || Opcode == ISD::ADDC || Opcode == ISD::SUBC; in SelectADD_SUB_I64()
826 bool IsAdd = Opcode == ISD::ADD || Opcode == ISD::ADDC || Opcode == ISD::ADDE; in SelectADD_SUB_I64()
|
| /openbsd-src/gnu/llvm/llvm/lib/Target/PowerPC/ |
| H A D | P9InstrResources.td | 134 (instregex "ADDC(8)?(O)?$"),
1041 (instregex "ADDC(8)?(O)?_rec$"),
|
| H A D | P10InstrResources.td | 1233 ADDC, ADDC8,
|
| /openbsd-src/gnu/llvm/llvm/lib/Target/ARC/ |
| H A D | ARCISelLowering.cpp | 124 setOperationAction(ISD::ADDC, MVT::i32, Legal); in ARCTargetLowering()
|
| /openbsd-src/gnu/llvm/llvm/lib/Target/Sparc/ |
| H A D | SparcISelLowering.cpp | 1693 setOperationAction(ISD::ADDC, MVT::i32, Custom); in SparcTargetLowering()
1699 setOperationAction(ISD::ADDC, MVT::i64, Custom); in SparcTargetLowering()
3085 case ISD::ADDC: hiOpc = ISD::ADDE; break; in LowerADDC_ADDE_SUBC_SUBE()
3242 case ISD::ADDC: in LowerOperation()
|
| /openbsd-src/gnu/llvm/llvm/lib/Target/Mips/ |
| H A D | MipsSEISelDAGToDAG.cpp | 214 if (Opc == ISD::ADDC) { in selectAddE()
|
| /openbsd-src/gnu/usr.bin/binutils-2.17/cpu/ |
| H A D | cris.cpu | 1687 "SCC" "ADDC" "SETF" "CLEARF"
1700 "MUL" "BDAP_M" "ADDC" "BOUND"
3259 ; ADDC Rs,Rd [ Rd | 01010111 | Rs ]
3273 ; ADDC [Rs],Rd [ Rd | 10011010 | Rs ]
3274 ; ADDC [Rs+],Rd [ Rd | 11011010 | Rs ]
3286 ; (ADDC [Rs+],Rd [ Rd | 11011010 | 1111 ])
|
| /openbsd-src/gnu/llvm/llvm/lib/CodeGen/ |
| H A D | TargetLoweringBase.cpp | 830 setOperationAction({ISD::ADDC, ISD::ADDE, ISD::SUBC, ISD::SUBE}, VT, in initActions()
|
| /openbsd-src/gnu/llvm/llvm/lib/Target/MSP430/ |
| H A D | MSP430InstrInfo.td | 543 defm ADDC : Arith<0b0110, "addc", adde, 1, [SR]>;
|
| /openbsd-src/gnu/llvm/llvm/lib/Target/NVPTX/ |
| H A D | NVPTXISelLowering.cpp | 540 setOperationAction(ISD::ADDC, MVT::i32, Legal); in NVPTXTargetLowering()
545 setOperationAction(ISD::ADDC, MVT::i64, Legal); in NVPTXTargetLowering()
|