| /netbsd-src/sys/external/bsd/drm2/dist/drm/amd/display/dc/dcn10/ |
| H A D | amdgpu_dcn10_optc.c | 69 int vupdate_offset, in optc1_program_global_sync() argument
76 optc1->vupdate_offset = vupdate_offset; in optc1_program_global_sync()
88 VUPDATE_OFFSET, optc1->vupdate_offset, in optc1_program_global_sync()
149 int vupdate_offset, in optc1_program_timing() argument
169 optc1->vupdate_offset = vupdate_offset; in optc1_program_timing()
277 vupdate_offset, in optc1_program_timing()
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| H A D | dcn10_optc.h | 511 int vupdate_offset; member
556 int vupdate_offset,
576 int vupdate_offset,
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| H A D | amdgpu_dcn10_hubp.c | 137 + pipe_dest->vupdate_offset) / pipe_dest->htotal) <= pipe_dest->vblank_end) { in hubp1_vready_workaround()
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| H A D | amdgpu_dcn10_hw_sequencer.c | 813 pipe_ctx->pipe_dlg_param.vupdate_offset, in dcn10_enable_stream_timing()
2467 pipe_ctx->pipe_dlg_param.vupdate_offset, in dcn10_program_all_pipe_in_tree()
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| /netbsd-src/sys/external/bsd/drm2/dist/drm/amd/display/dc/inc/hw/ |
| H A D | timing_generator.h | 145 int vupdate_offset,
225 int vupdate_offset,
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| /netbsd-src/sys/external/bsd/drm2/dist/drm/amd/display/dc/dml/dcn20/ |
| H A D | amdgpu_display_rq_dlg_calc_20v2.c | 851 unsigned int vupdate_offset; in dml20v2_rq_dlg_get_dlg_params() local
1005 vupdate_offset = dst->vupdate_offset; in dml20v2_rq_dlg_get_dlg_params()
1032 - (double) (vready_offset + vupdate_width + vupdate_offset) / htotal in dml20v2_rq_dlg_get_dlg_params()
1039 - (double) (vready_offset + vupdate_width + vupdate_offset) / htotal in dml20v2_rq_dlg_get_dlg_params()
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| H A D | amdgpu_display_rq_dlg_calc_20.c | 851 unsigned int vupdate_offset; in dml20_rq_dlg_get_dlg_params() local
1004 vupdate_offset = dst->vupdate_offset; in dml20_rq_dlg_get_dlg_params()
1031 - (double) (vready_offset + vupdate_width + vupdate_offset) / htotal in dml20_rq_dlg_get_dlg_params()
1038 - (double) (vready_offset + vupdate_width + vupdate_offset) / htotal in dml20_rq_dlg_get_dlg_params()
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| /netbsd-src/sys/external/bsd/drm2/dist/drm/amd/display/dc/dml/ |
| H A D | amdgpu_dml1_display_rq_dlg_calc.c | 1048 unsigned int vupdate_offset; in dml1_rq_dlg_get_dlg_params() local
1230 vupdate_offset = e2e_pipe_param.pipe.dest.vupdate_offset; in dml1_rq_dlg_get_dlg_params()
1301 line_setup = (double) (vupdate_offset + vupdate_width + vready_offset) / (double) htotal; in dml1_rq_dlg_get_dlg_params()
1326 DTRACE("DLG: %s: vupdate_offset = %d", __func__, vupdate_offset); in dml1_rq_dlg_get_dlg_params()
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| H A D | display_mode_structs.h | 326 unsigned int vupdate_offset; member
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| /netbsd-src/sys/external/bsd/drm2/dist/drm/amd/display/dc/dml/dcn21/ |
| H A D | amdgpu_display_rq_dlg_calc_21.c | 897 unsigned int vupdate_offset; in dml_rq_dlg_get_dlg_params() local
1044 vupdate_offset = dst->vupdate_offset; in dml_rq_dlg_get_dlg_params()
1071 - (double) (vready_offset + vupdate_width + vupdate_offset) / htotal in dml_rq_dlg_get_dlg_params()
1078 - (double) (vready_offset + vupdate_width + vupdate_offset) / htotal in dml_rq_dlg_get_dlg_params()
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| /netbsd-src/sys/external/bsd/drm2/dist/drm/amd/display/dc/dce110/ |
| H A D | dce110_timing_generator.h | 264 int vupdate_offset,
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| H A D | amdgpu_dce110_timing_generator_v.c | 445 int vupdate_offset, in dce110_timing_generator_v_program_timing() argument
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| H A D | amdgpu_dce110_timing_generator.c | 1967 int vupdate_offset, in dce110_tg_program_timing() argument
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| /netbsd-src/sys/external/bsd/drm2/dist/drm/amd/display/dc/dce80/ |
| H A D | amdgpu_dce80_timing_generator.c | 117 int vupdate_offset, in program_timing() argument
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| /netbsd-src/sys/external/bsd/drm2/dist/drm/amd/display/dc/calcs/ |
| H A D | amdgpu_dcn_calcs.c | 437 input->dest.vupdate_offset = pipe->pipe_dlg_param.vupdate_offset; in pipe_ctx_to_e2e_pipe_params()
438 input->dest.vupdate_offset = pipe->pipe_dlg_param.vupdate_offset; in pipe_ctx_to_e2e_pipe_params()
1184 pipe->pipe_dlg_param.vupdate_offset = v->v_update_offset_pix[input_idx]; in dcn_validate_bandwidth()
1225 hsplit_pipe->pipe_dlg_param.vupdate_offset = v->v_update_offset_pix[input_idx]; in dcn_validate_bandwidth()
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| /netbsd-src/sys/external/bsd/drm2/dist/drm/amd/display/dc/dcn20/ |
| H A D | amdgpu_dcn20_hwseq.c | 658 pipe_ctx->pipe_dlg_param.vupdate_offset, in dcn20_enable_stream_timing()
1216 || old_pipe->pipe_dlg_param.vupdate_offset != new_pipe->pipe_dlg_param.vupdate_offset in dcn20_detect_pipe_changes()
1488 pipe_ctx->pipe_dlg_param.vupdate_offset, in dcn20_program_pipe()
1728 pipe_ctx->pipe_dlg_param.vupdate_offset, in dcn20_update_bandwidth()
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| H A D | amdgpu_dcn20_hubp.c | 190 + pipe_dest->vupdate_offset) / pipe_dest->htotal) <= pipe_dest->vblank_end) { in hubp2_vready_at_or_After_vsync()
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| H A D | amdgpu_dcn20_resource.c | 2812 dst->vupdate_offset = context->bw_ctx.dml.vba.VUpdateOffsetPix[pipe_idx_unsplit]; in dcn20_calculate_dlg_params()
2827 dst_j->vupdate_offset = context->bw_ctx.dml.vba.VUpdateOffsetPix[pipe_idx_unsplit]; in dcn20_calculate_dlg_params()
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| /netbsd-src/sys/external/bsd/drm2/dist/drm/amd/display/dc/dce120/ |
| H A D | amdgpu_dce120_timing_generator.c | 746 int vupdate_offset, in dce120_tg_program_timing() argument
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