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/netbsd-src/sys/arch/x86/pci/
H A Dpci_msi_machdep.c96 pci_intr_handle_t *vectors, pih; in pci_msi_alloc_vectors() local
101 vectors = kmem_zalloc(sizeof(vectors[0]) * (*count), KM_SLEEP); in pci_msi_alloc_vectors()
119 kmem_free(vectors, sizeof(vectors[0]) * (*count)); in pci_msi_alloc_vectors()
123 vectors[i] = pih; in pci_msi_alloc_vectors()
127 return vectors; in pci_msi_alloc_vectors()
157 pci_intr_handle_t *vectors; in pci_msi_alloc_common() local
178 vectors = NULL; in pci_msi_alloc_common()
180 vectors = pci_msi_alloc_vectors(msi_pic, NULL, count); in pci_msi_alloc_common()
181 if (vectors != NULL) in pci_msi_alloc_common()
193 if (vectors == NULL) { in pci_msi_alloc_common()
[all …]
/netbsd-src/external/bsd/unbound/dist/testdata/svcb.tdir/
H A Dsvcb.test8 # check and write the test vectors in their respective formats
10 if ! $PRE/readzone svcb.test-vectors-pf.zone > svcb.test-vectors-pf.zone.out
15 elif ! $PRE/readzone svcb.test-vectors-pf.zone.out > svcb.test-vectors-pf.zone.out.out
20 elif ! $PRE/readzone svcb.test-vectors-wf.zone > svcb.test-vectors-wf.zone.out
25 elif ! $PRE/readzone svcb.test-vectors-wf.zone.out > svcb.test-vectors-wf.zone.out.out
35 if ! diff svcb.test-vectors-pf.zone.out svcb.test-vectors-pf.zone.out.out
40 elif ! diff svcb.test-vectors-pf.zone.out svcb.test-vectors-wf.zone.out
45 elif ! diff svcb.test-vectors-pf.zone.out svcb.test-vectors-wf.zone.out.out
/netbsd-src/external/gpl3/binutils.old/dist/ld/scripttempl/
H A Delfmicroblaze.sc72 .vectors.reset 0x0 : { KEEP (*(.vectors.reset)) } = 0
73 .vectors.sw_exception 0x8 : { KEEP (*(.vectors.sw_exception)) } = 0
74 .vectors.interrupt 0x10 : { KEEP (*(.vectors.interrupt)) } = 0
75 .vectors.debug_sw_break 0x18 : { KEEP (*(.vectors.debug_sw_break)) } = 0
76 .vectors.hw_exception 0x20 : { KEEP (*(.vectors.hw_exception)) } = 0
H A Dtic4xcoff.sc7 # In microcomputer (MC) mode, the vectors are mapped into the on-chip ROM,
8 # otherwise in microprocessor (MP) mode the vectors are mapped to address 0
101 /* Reset, interrupt, and trap vectors. */
102 .vectors ${RELOCATING+ 0} : {
103 *(.vectors)
/netbsd-src/external/gpl3/gcc.old/dist/gcc/
H A Dmode-classes.def33 DEF_MODE_CLASS (MODE_VECTOR_BOOL), /* vectors of single bits */ \
34 DEF_MODE_CLASS (MODE_VECTOR_INT), /* SIMD vectors */ \
35 DEF_MODE_CLASS (MODE_VECTOR_FRACT), /* SIMD vectors */ \
36 DEF_MODE_CLASS (MODE_VECTOR_UFRACT), /* SIMD vectors */ \
37 DEF_MODE_CLASS (MODE_VECTOR_ACCUM), /* SIMD vectors */ \
38 DEF_MODE_CLASS (MODE_VECTOR_UACCUM), /* SIMD vectors */ \
/netbsd-src/external/gpl3/gcc/dist/gcc/
H A Dmode-classes.def33 DEF_MODE_CLASS (MODE_VECTOR_BOOL), /* vectors of single bits */ \
34 DEF_MODE_CLASS (MODE_VECTOR_INT), /* SIMD vectors */ \
35 DEF_MODE_CLASS (MODE_VECTOR_FRACT), /* SIMD vectors */ \
36 DEF_MODE_CLASS (MODE_VECTOR_UFRACT), /* SIMD vectors */ \
37 DEF_MODE_CLASS (MODE_VECTOR_ACCUM), /* SIMD vectors */ \
38 DEF_MODE_CLASS (MODE_VECTOR_UACCUM), /* SIMD vectors */ \
/netbsd-src/sys/arch/arm/pci/
H A Dpci_msi_machdep.c84 pci_intr_handle_t *vectors; in arm_pci_msi_alloc_common() local
94 vectors = msi->msi_alloc(msi, count, pa, exact); in arm_pci_msi_alloc_common()
95 if (vectors == NULL) in arm_pci_msi_alloc_common()
98 *ihps = vectors; in arm_pci_msi_alloc_common()
106 pci_intr_handle_t *vectors; in arm_pci_msix_alloc_common() local
116 vectors = msi->msix_alloc(msi, table_indexes, count, pa, exact); in arm_pci_msix_alloc_common()
117 if (vectors == NULL) in arm_pci_msix_alloc_common()
120 *ihps = vectors; in arm_pci_msix_alloc_common()
/netbsd-src/external/gpl3/binutils/dist/ld/scripttempl/
H A Delfmicroblaze.sc72 .vectors.reset 0x0 : { KEEP (*(.vectors.reset)) } = 0
73 .vectors.sw_exception 0x8 : { KEEP (*(.vectors.sw_exception)) } = 0
74 .vectors.interrupt 0x10 : { KEEP (*(.vectors.interrupt)) } = 0
75 .vectors.debug_sw_break 0x18 : { KEEP (*(.vectors.debug_sw_break)) } = 0
76 .vectors.hw_exception 0x20 : { KEEP (*(.vectors.hw_exception)) } = 0
H A Dtic4xcoff.sc7 # In microcomputer (MC) mode, the vectors are mapped into the on-chip ROM,
8 # otherwise in microprocessor (MP) mode the vectors are mapped to address 0
101 /* Reset, interrupt, and trap vectors. */
102 .vectors ${RELOCATING+ 0} : {
103 *(.vectors)
/netbsd-src/sys/arch/atari/atari/
H A Dvectors.s212 BADTRAP16 | 112-255: user interrupt vectors
213 BADTRAP16 | 112-255: user interrupt vectors
214 BADTRAP16 | 112-255: user interrupt vectors
215 BADTRAP16 | 112-255: user interrupt vectors
216 BADTRAP16 | 112-255: user interrupt vectors
217 BADTRAP16 | 112-255: user interrupt vectors
218 BADTRAP16 | 112-255: user interrupt vectors
219 BADTRAP16 | 112-255: user interrupt vectors
220 BADTRAP16 | 112-255: user interrupt vectors
221 BADTRAP16 | 112-255: user interrupt vectors
/netbsd-src/sys/arch/arm/cortex/
H A Dgic_v2m.c233 pci_intr_handle_t *vectors; in gic_v2m_msi_alloc() local
253 vectors = kmem_alloc(sizeof(*vectors) * *count, KM_SLEEP); in gic_v2m_msi_alloc()
256 vectors[n] = ARM_PCI_INTR_MSI | in gic_v2m_msi_alloc()
264 return vectors; in gic_v2m_msi_alloc()
272 pci_intr_handle_t *vectors; in gic_v2m_msix_alloc() local
313 vectors = kmem_alloc(sizeof(*vectors) * *count, KM_SLEEP); in gic_v2m_msix_alloc()
317 vectors[msix_vec] = ARM_PCI_INTR_MSIX | in gic_v2m_msix_alloc()
327 return vectors; in gic_v2m_msix_alloc()
H A Dgicv3_its.c405 u_int vectors; in gicv3_its_msi_enable()
408 vectors = MAX(2, count); in gicv3_its_msi_enable()
409 while (!powerof2(vectors)) in gicv3_its_msi_enable()
410 vectors++; in gicv3_its_msi_enable()
414 const u_int itt_size = roundup(uimax(vectors, 2) * itt_entry_size, GITS_ITT_ALIGN); in gicv3_its_msi_enable()
578 pci_intr_handle_t *vectors; in gicv3_its_msix_alloc()
594 vectors = kmem_alloc(sizeof(*vectors) * *count, KM_SLEEP); in gicv3_its_msix_alloc()
599 vectors[n] = ARM_PCI_INTR_MSI | in gicv3_its_msix_alloc()
623 kmem_free(vectors, sizeo in gicv3_its_msi_intr_establish()
361 u_int vectors; gicv3_its_device_map() local
499 pci_intr_handle_t *vectors; gicv3_its_msi_alloc() local
552 pci_intr_handle_t *vectors; gicv3_its_msix_alloc() local
[all...]
/netbsd-src/crypto/external/bsd/openssl/dist/test/recipes/30-test_evp_data/
H A Devpmd_sha.txt91 # Some of the test vectors from the SHS CAVP for FIPS 180-4
121 # Some of the test vectors from the SHS CAVP for FIPS 180-4
155 # Empty input and \xA3x200 vectors are taken from
157 # Others are pairs of "LongMsg" vectors available at
158 # http://csrc.nist.gov/groups/STM/cavp/secure-hashing.html#test-vectors
265 # Following tests are pairs of *last* "VariableOut" vectors from
266 # http://csrc.nist.gov/groups/STM/cavp/secure-hashing.html#test-vectors
H A Devpciph_aes_stitched.txt1 Title = AES-128-CBC-HMAC-SHA1 test vectors
33 Title = AES-256-CBC-HMAC-SHA1 test vectors
64 Title = AES-128-CBC-HMAC-SHA256 test vectors
96 Title = AES-256-CBC-HMAC-SHA256 test vectors
H A Devpciph_aria.txt14 Title = ARIA test vectors from RFC5794 (and others)
31 # Additional ARIA mode vectors from http://210.104.33.10/ARIA/doc/ARIA-testvector-e.pdf
149 Title = ARIA GCM test vectors from RFC8269
167 Title = ARIA GCM self-generated test vectors
197 Title = ARIA CCM test vectors from IETF draft-ietf-avtcore-aria-srtp-02
H A Devpmac_poly1305.txt84 # test vectors from "The Poly1305-AES message-authentication code"
111 # self-generated vectors exercise "significant" length such that* are handled by different code pat…
191 # test vectors from Google
224 # test vectors from Hanno Bock
256 # test vectors from Andrew Moon - nacl
H A Devpciph_aes_common.txt16 Title = AES (from FIPS-197 test vectors)
24 # AES 192 ECB tests (from FIPS-197 test vectors, encrypt)
33 # AES 256 ECB tests (from FIPS-197 test vectors, encrypt)
42 # AES 128 ECB tests (from NIST test vectors, encrypt)
46 # AES 128 ECB tests (from NIST test vectors, decrypt)
50 # AES 192 ECB tests (from NIST test vectors, decrypt)
54 # AES 256 ECB tests (from NIST test vectors, decrypt)
58 # AES 128 CBC tests (from NIST test vectors, encrypt)
62 # AES 192 CBC tests (from NIST test vectors, encrypt)
66 # AES 256 CBC tests (from NIST test vectors, encrypt)
[all …]
/netbsd-src/sys/external/bsd/compiler_rt/dist/test/Unit/
H A Dcomparedf2_test.c145 static const struct TestVector vectors[] = { variable
473 const int numVectors = sizeof vectors / sizeof vectors[0]; in main()
476 if (test__cmpdf2(&vectors[i])) return 1; in main()
H A Dcomparesf2_test.c145 static const struct TestVector vectors[] = { variable
473 const int numVectors = sizeof vectors / sizeof vectors[0]; in main()
476 if (test__cmpsf2(&vectors[i])) return 1; in main()
/netbsd-src/sys/external/bsd/compiler_rt/dist/test/builtins/Unit/
H A Dcomparedf2_test.c145 static const struct TestVector vectors[] = { variable
473 const int numVectors = sizeof vectors / sizeof vectors[0]; in main()
476 if (test__cmpdf2(&vectors[i])) return 1; in main()
H A Dcomparesf2_test.c145 static const struct TestVector vectors[] = { variable
473 const int numVectors = sizeof vectors / sizeof vectors[0]; in main()
476 if (test__cmpsf2(&vectors[i])) return 1; in main()
/netbsd-src/sys/arch/arm/include/
H A Dasan.h235 static const char * const vectors[] = { in __md_unwind_end() local
245 for (size_t i = 0; i < __arraycount(vectors); i++) { in __md_unwind_end()
246 if (!strncmp(name, vectors[i], strlen(vectors[i]))) in __md_unwind_end()
/netbsd-src/sys/arch/arm/apple/
H A Dapple_pcie.c581 pci_intr_handle_t *vectors; in apple_pcie_msi_msi_alloc() local
604 vectors = kmem_alloc(sizeof(*vectors) * *count, KM_SLEEP); in apple_pcie_msi_msi_alloc()
607 vectors[n] = ARM_PCI_INTR_MSI | in apple_pcie_msi_msi_alloc()
615 return vectors; in apple_pcie_msi_msi_alloc()
623 pci_intr_handle_t *vectors; in apple_pcie_msi_msix_alloc() local
663 vectors = kmem_alloc(sizeof(*vectors) * *count, KM_SLEEP); in apple_pcie_msi_msix_alloc()
667 vectors[msix_vec] = ARM_PCI_INTR_MSIX | in apple_pcie_msi_msix_alloc()
677 return vectors; in apple_pcie_msi_msix_alloc()
/netbsd-src/crypto/external/bsd/openssl.old/dist/test/recipes/30-test_evp_data/
H A Devpdigest.txt16 # There are no official BLAKE2 test vectors we can use since they all use a key
170 # Some of the test vectors from the SHS CAVP for FIPS 180-4
200 # Some of the test vectors from the SHS CAVP for FIPS 180-4
380 # Empty input and \xA3x200 vectors are taken from
382 # Others are pairs of "LongMsg" vectors available at
383 # http://csrc.nist.gov/groups/STM/cavp/secure-hashing.html#test-vectors
490 # Following tests are pairs of *last* "VariableOut" vectors from
491 # http://csrc.nist.gov/groups/STM/cavp/secure-hashing.html#test-vectors
/netbsd-src/external/gpl3/gcc.old/dist/gcc/config/aarch64/
H A Daarch64-modes.def84 /* Define SVE modes for NVECS vectors. VB, VH, VS and VD are the prefixes
110 /* Give SVE vectors the names normally used for 256-bit vectors.
117 /* Partial SVE vectors:
124 vectors. E.g. VNx8QImode is half the size of VNx16QImode.
162 /* A 4-tuple of SVE vectors with the maximum -msve-vector-bits= setting.

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