Searched refs:ulClock (Results 1 – 9 of 9) sorted by relevance
192 engine_clock_parameters.sReserved.ulClock = in atomctrl_set_engine_dram_timings_rv770()262 mpll_parameters.ulClock = cpu_to_le32(clock_value); in atomctrl_get_memory_pll_dividers_si()310 mpll_parameters.ulClock.ulClock = cpu_to_le32(clock_value); in atomctrl_get_memory_pll_dividers_vi()318 (uint32_t)mpll_parameters.ulClock.ucPostDiv; in atomctrl_get_memory_pll_dividers_vi()331 mpll_parameters.ulClock.ulClock = cpu_to_le32(clock_value); in atomctrl_get_memory_pll_dividers_ai()345 mpll_param->ulClock = in atomctrl_get_memory_pll_dividers_ai()346 le32_to_cpu(mpll_parameters.ulClock.ulClock); in atomctrl_get_memory_pll_dividers_ai()347 mpll_param->ulPostDiv = mpll_parameters.ulClock.ucPostDiv; in atomctrl_get_memory_pll_dividers_ai()361 pll_parameters.ulClock = cpu_to_le32(clock_value); in atomctrl_get_engine_pll_dividers_kong()369 dividers->real_clock = le32_to_cpu(pll_parameters.ulClock); in atomctrl_get_engine_pll_dividers_kong()[all …]
63 uint32_t ulClock; /* the actual clock */ member
152 uint32_t ulClock; member
271 dividers->ulClock = le32_to_cpu(pll_output->gpuclock_10khz); in pp_atomfwctrl_get_gpu_pll_dividers_vega10()
1064 args.v4.ulClock = cpu_to_le32(clock); /* 10 khz */ in amdgpu_atombios_get_clock_dividers()1069 dividers->real_clock = le32_to_cpu(args.v4.ulClock); in amdgpu_atombios_get_clock_dividers()1074 args.v6_in.ulClock.ulComputeClockFlag = clock_type; in amdgpu_atombios_get_clock_dividers()1075 args.v6_in.ulClock.ulClockFreq = cpu_to_le32(clock); /* 10 khz */ in amdgpu_atombios_get_clock_dividers()1084 dividers->real_clock = le32_to_cpu(args.v6_out.ulClock.ulClock); in amdgpu_atombios_get_clock_dividers()1085 dividers->post_divider = args.v6_out.ulClock.ucPostDiv; in amdgpu_atombios_get_clock_dividers()1113 args.ulClock = cpu_to_le32(clock); /* 10 khz */ in amdgpu_atombios_get_memory_pll_dividers()1158 args.sReserved.ulClock = cpu_to_le32(mem_clock & SET_CLOCK_FREQ_MASK); in amdgpu_atombios_set_engine_dram_timings()
442 …ULONG ulClock; //When returen, it's the re-calculated clock based on given Fb_div Post_Di… member451 ULONG ulClock; //When return, [23:0] return real clock member498 ATOM_COMPUTE_CLOCK_FREQ ulClock; //Input Parameter member520 ULONG ulClock:24; //Input= target clock, output = actual clock member522 ULONG ulClock:24; //Input= target clock, output = actual clock531 ATOM_COMPUTE_CLOCK_FREQ ulClock; //Input Parameter member548 ATOM_COMPUTE_CLOCK_FREQ ulClock; //Input Parameter member560 …COMPUTE_MEMORY_ENGINE_PLL_PARAMETERS_V4 ulClock; //Output Parameter: ucPostDiv=DFS divider member573 ATOM_COMPUTE_CLOCK_FREQ ulClock; //Input Parameter member584 …COMPUTE_MEMORY_ENGINE_PLL_PARAMETERS_V4 ulClock; //Output Parameter: ucPostDiv=DFS divider member[all …]
2852 args.v1.ulClock = cpu_to_le32(clock); /* 10 khz */ in radeon_atom_get_clock_dividers()2866 args.v2.ulClock = cpu_to_le32(clock); /* 10 khz */ in radeon_atom_get_clock_dividers()2874 dividers->enable_post_div = (le32_to_cpu(args.v2.ulClock) & (1 << 24)) ? in radeon_atom_get_clock_dividers()2876 dividers->vco_mode = (le32_to_cpu(args.v2.ulClock) & (1 << 25)) ? 1 : 0; in radeon_atom_get_clock_dividers()2920 args.v4.ulClock = cpu_to_le32(clock); /* 10 khz */ in radeon_atom_get_clock_dividers()2925 dividers->real_clock = le32_to_cpu(args.v4.ulClock); in radeon_atom_get_clock_dividers()2930 args.v6_in.ulClock.ulComputeClockFlag = clock_type; in radeon_atom_get_clock_dividers()2931 args.v6_in.ulClock.ulClockFreq = cpu_to_le32(clock); /* 10 khz */ in radeon_atom_get_clock_dividers()2940 dividers->real_clock = le32_to_cpu(args.v6_out.ulClock.ulClock); in radeon_atom_get_clock_dividers()2941 dividers->post_divider = args.v6_out.ulClock.ucPostDiv; in radeon_atom_get_clock_dividers()[all …]
412 …ULONG ulClock; //When returen, it's the re-calculated clock based on given Fb_div Post_Di… member421 ULONG ulClock; //When return, [23:0] return real clock member464 ATOM_COMPUTE_CLOCK_FREQ ulClock; //Input Parameter member486 ULONG ulClock:24; //Input= target clock, output = actual clock member488 ULONG ulClock:24; //Input= target clock, output = actual clock 497 ATOM_COMPUTE_CLOCK_FREQ ulClock; //Input Parameter member514 ATOM_COMPUTE_CLOCK_FREQ ulClock; //Input Parameter member525 …COMPUTE_MEMORY_ENGINE_PLL_PARAMETERS_V4 ulClock; //Output Parameter: ucPostDiv=DFS divider member545 ULONG ulClock; member570 ATOM_COMPUTE_CLOCK_FREQ ulClock; member[all …]
975 mem_level->MclkFrequency = (uint32_t)mpll_param.ulClock; in vegam_calculate_mclk_params()