| /netbsd-src/sys/external/bsd/drm2/dist/drm/nouveau/nvkm/subdev/fb/ |
| H A D | nouveau_nvkm_subdev_fb_nv20.c | 36 u32 flags, struct nvkm_fb_tile *tile) in nv20_fb_tile_init() argument
38 tile->addr = 0x00000001 | addr; in nv20_fb_tile_init()
39 tile->limit = max(1u, addr + size) - 1; in nv20_fb_tile_init()
40 tile->pitch = pitch; in nv20_fb_tile_init()
42 fb->func->tile.comp(fb, i, size, flags, tile); in nv20_fb_tile_init()
43 tile->addr |= 2; in nv20_fb_tile_init()
49 struct nvkm_fb_tile *tile) in nv20_fb_tile_comp() argument
53 if (!nvkm_mm_head(&fb->tags, 0, 1, tags, tags, 1, &tile->tag)) { in nv20_fb_tile_comp()
54 if (!(flags & 2)) tile->zcomp = 0x00000000; /* Z16 */ in nv20_fb_tile_comp()
55 else tile->zcomp = 0x04000000; /* Z24S8 */ in nv20_fb_tile_comp()
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| H A D | nouveau_nvkm_subdev_fb_nv30.c | 36 u32 flags, struct nvkm_fb_tile *tile) in nv30_fb_tile_init() argument
40 tile->addr = (0 << 4); in nv30_fb_tile_init()
42 if (fb->func->tile.comp) /* z compression */ in nv30_fb_tile_init()
43 fb->func->tile.comp(fb, i, size, flags, tile); in nv30_fb_tile_init()
44 tile->addr = (1 << 4); in nv30_fb_tile_init()
47 tile->addr |= 0x00000001; /* enable */ in nv30_fb_tile_init()
48 tile->addr |= addr; in nv30_fb_tile_init()
49 tile->limit = max(1u, addr + size) - 1; in nv30_fb_tile_init()
50 tile->pitch = pitch; in nv30_fb_tile_init()
55 struct nvkm_fb_tile *tile) in nv30_fb_tile_comp() argument
[all …]
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| H A D | nouveau_nvkm_subdev_fb_nv10.c | 36 u32 flags, struct nvkm_fb_tile *tile) in nv10_fb_tile_init() argument
38 tile->addr = 0x80000000 | addr; in nv10_fb_tile_init()
39 tile->limit = max(1u, addr + size) - 1; in nv10_fb_tile_init()
40 tile->pitch = pitch; in nv10_fb_tile_init()
44 nv10_fb_tile_fini(struct nvkm_fb *fb, int i, struct nvkm_fb_tile *tile) in nv10_fb_tile_fini() argument
46 tile->addr = 0; in nv10_fb_tile_fini()
47 tile->limit = 0; in nv10_fb_tile_fini()
48 tile->pitch = 0; in nv10_fb_tile_fini()
49 tile->zcomp = 0; in nv10_fb_tile_fini()
53 nv10_fb_tile_prog(struct nvkm_fb *fb, int i, struct nvkm_fb_tile *tile) in nv10_fb_tile_prog() argument
[all …]
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| H A D | nouveau_nvkm_subdev_fb_nv35.c | 36 struct nvkm_fb_tile *tile) in nv35_fb_tile_comp() argument
40 if (!nvkm_mm_head(&fb->tags, 0, 1, tags, tags, 1, &tile->tag)) { in nv35_fb_tile_comp()
41 if (flags & 2) tile->zcomp |= 0x04000000; /* Z16 */ in nv35_fb_tile_comp()
42 else tile->zcomp |= 0x08000000; /* Z24S8 */ in nv35_fb_tile_comp()
43 tile->zcomp |= ((tile->tag->offset ) >> 6); in nv35_fb_tile_comp()
44 tile->zcomp |= ((tile->tag->offset + tags - 1) >> 6) << 13; in nv35_fb_tile_comp()
46 tile->zcomp |= 0x40000000; in nv35_fb_tile_comp()
55 .tile.regions = 8,
56 .tile.init = nv30_fb_tile_init,
57 .tile.comp = nv35_fb_tile_comp,
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| H A D | nouveau_nvkm_subdev_fb_nv36.c | 36 struct nvkm_fb_tile *tile) in nv36_fb_tile_comp() argument
40 if (!nvkm_mm_head(&fb->tags, 0, 1, tags, tags, 1, &tile->tag)) { in nv36_fb_tile_comp()
41 if (flags & 2) tile->zcomp |= 0x10000000; /* Z16 */ in nv36_fb_tile_comp()
42 else tile->zcomp |= 0x20000000; /* Z24S8 */ in nv36_fb_tile_comp()
43 tile->zcomp |= ((tile->tag->offset ) >> 6); in nv36_fb_tile_comp()
44 tile->zcomp |= ((tile->tag->offset + tags - 1) >> 6) << 14; in nv36_fb_tile_comp()
46 tile->zcomp |= 0x80000000; in nv36_fb_tile_comp()
55 .tile.regions = 8,
56 .tile.init = nv30_fb_tile_init,
57 .tile.comp = nv36_fb_tile_comp,
[all …]
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| H A D | nouveau_nvkm_subdev_fb_nv40.c | 36 struct nvkm_fb_tile *tile) in nv40_fb_tile_comp() argument
41 !nvkm_mm_head(&fb->tags, 0, 1, tags, tags, 1, &tile->tag)) { in nv40_fb_tile_comp()
42 tile->zcomp = 0x28000000; /* Z24S8_SPLIT_GRAD */ in nv40_fb_tile_comp()
43 tile->zcomp |= ((tile->tag->offset ) >> 8); in nv40_fb_tile_comp()
44 tile->zcomp |= ((tile->tag->offset + tags - 1) >> 8) << 13; in nv40_fb_tile_comp()
46 tile->zcomp |= 0x40000000; in nv40_fb_tile_comp()
61 .tile.regions = 8,
62 .tile.init = nv30_fb_tile_init,
63 .tile.comp = nv40_fb_tile_comp,
64 .tile.fini = nv20_fb_tile_fini,
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| H A D | nouveau_nvkm_subdev_fb_nv44.c | 36 u32 flags, struct nvkm_fb_tile *tile) in nv44_fb_tile_init() argument
38 tile->addr = 0x00000001; /* mode = vram */ in nv44_fb_tile_init()
39 tile->addr |= addr; in nv44_fb_tile_init()
40 tile->limit = max(1u, addr + size) - 1; in nv44_fb_tile_init()
41 tile->pitch = pitch; in nv44_fb_tile_init()
45 nv44_fb_tile_prog(struct nvkm_fb *fb, int i, struct nvkm_fb_tile *tile) in nv44_fb_tile_prog() argument
48 nvkm_wr32(device, 0x100604 + (i * 0x10), tile->limit); in nv44_fb_tile_prog()
49 nvkm_wr32(device, 0x100608 + (i * 0x10), tile->pitch); in nv44_fb_tile_prog()
50 nvkm_wr32(device, 0x100600 + (i * 0x10), tile->addr); in nv44_fb_tile_prog()
65 .tile.regions = 12,
[all …]
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| H A D | nouveau_nvkm_subdev_fb_nv25.c | 36 struct nvkm_fb_tile *tile) in nv25_fb_tile_comp() argument
40 if (!nvkm_mm_head(&fb->tags, 0, 1, tags, tags, 1, &tile->tag)) { in nv25_fb_tile_comp()
41 if (!(flags & 2)) tile->zcomp = 0x00100000; /* Z16 */ in nv25_fb_tile_comp()
42 else tile->zcomp = 0x00200000; /* Z24S8 */ in nv25_fb_tile_comp()
43 tile->zcomp |= tile->tag->offset; in nv25_fb_tile_comp()
45 tile->zcomp |= 0x01000000; in nv25_fb_tile_comp()
53 .tile.regions = 8,
54 .tile.init = nv20_fb_tile_init,
55 .tile.comp = nv25_fb_tile_comp,
56 .tile.fini = nv20_fb_tile_fini,
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| H A D | nouveau_nvkm_subdev_fb_nv46.c | 36 u32 flags, struct nvkm_fb_tile *tile) in nv46_fb_tile_init() argument
39 if (!(flags & 4)) tile->addr = (0 << 3); in nv46_fb_tile_init()
40 else tile->addr = (1 << 3); in nv46_fb_tile_init()
42 tile->addr |= 0x00000001; /* mode = vram */ in nv46_fb_tile_init()
43 tile->addr |= addr; in nv46_fb_tile_init()
44 tile->limit = max(1u, addr + size) - 1; in nv46_fb_tile_init()
45 tile->pitch = pitch; in nv46_fb_tile_init()
51 .tile.regions = 15,
52 .tile.init = nv46_fb_tile_init,
53 .tile.fini = nv20_fb_tile_fini,
[all …]
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| H A D | nouveau_nvkm_subdev_fb_nv41.c | 35 nv41_fb_tile_prog(struct nvkm_fb *fb, int i, struct nvkm_fb_tile *tile) in nv41_fb_tile_prog() argument
38 nvkm_wr32(device, 0x100604 + (i * 0x10), tile->limit); in nv41_fb_tile_prog()
39 nvkm_wr32(device, 0x100608 + (i * 0x10), tile->pitch); in nv41_fb_tile_prog()
40 nvkm_wr32(device, 0x100600 + (i * 0x10), tile->addr); in nv41_fb_tile_prog()
42 nvkm_wr32(device, 0x100700 + (i * 0x04), tile->zcomp); in nv41_fb_tile_prog()
55 .tile.regions = 12,
56 .tile.init = nv30_fb_tile_init,
57 .tile.comp = nv40_fb_tile_comp,
58 .tile.fini = nv20_fb_tile_fini,
59 .tile.prog = nv41_fb_tile_prog,
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| H A D | nouveau_nvkm_subdev_fb_base.c | 40 nvkm_fb_tile_fini(struct nvkm_fb *fb, int region, struct nvkm_fb_tile *tile) in nvkm_fb_tile_fini() argument
42 fb->func->tile.fini(fb, region, tile); in nvkm_fb_tile_fini()
47 u32 pitch, u32 flags, struct nvkm_fb_tile *tile) in nvkm_fb_tile_init() argument
49 fb->func->tile.init(fb, region, addr, size, pitch, flags, tile); in nvkm_fb_tile_init()
53 nvkm_fb_tile_prog(struct nvkm_fb *fb, int region, struct nvkm_fb_tile *tile) in nvkm_fb_tile_prog() argument
56 if (fb->func->tile.prog) { in nvkm_fb_tile_prog()
57 fb->func->tile.prog(fb, region, tile); in nvkm_fb_tile_prog()
173 for (i = 0; i < fb->tile.regions; i++) in nvkm_fb_init()
174 fb->func->tile.prog(fb, i, &fb->tile.region[i]); in nvkm_fb_init()
210 for (i = 0; i < fb->tile.regions; i++) in nvkm_fb_dtor()
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| H A D | nouveau_nvkm_subdev_fb_nv47.c | 38 .tile.regions = 15,
39 .tile.init = nv30_fb_tile_init,
40 .tile.comp = nv40_fb_tile_comp,
41 .tile.fini = nv20_fb_tile_fini,
42 .tile.prog = nv41_fb_tile_prog,
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| H A D | nouveau_nvkm_subdev_fb_nv49.c | 38 .tile.regions = 15,
39 .tile.init = nv30_fb_tile_init,
40 .tile.comp = nv40_fb_tile_comp,
41 .tile.fini = nv20_fb_tile_fini,
42 .tile.prog = nv41_fb_tile_prog,
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| H A D | nouveau_nvkm_subdev_fb_nv1a.c | 36 .tile.regions = 8,
37 .tile.init = nv10_fb_tile_init,
38 .tile.fini = nv10_fb_tile_fini,
39 .tile.prog = nv10_fb_tile_prog,
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| H A D | nouveau_nvkm_subdev_fb_nv4e.c | 37 .tile.regions = 12,
38 .tile.init = nv46_fb_tile_init,
39 .tile.fini = nv20_fb_tile_fini,
40 .tile.prog = nv44_fb_tile_prog,
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| /netbsd-src/sys/external/bsd/drm2/dist/drm/i915/gem/selftests/ |
| H A D | i915_gem_mman.c | 24 struct tile { struct
38 static u64 tiled_offset(const struct tile *tile, u64 v) in tiled_offset() argument
42 if (tile->tiling == I915_TILING_NONE) in tiled_offset()
45 y = div64_u64_rem(v, tile->stride, &x); in tiled_offset()
46 v = div64_u64_rem(y, tile->height, &y) * tile->stride * tile->height; in tiled_offset()
48 if (tile->tiling == I915_TILING_X) { in tiled_offset()
49 v += y * tile->width; in tiled_offset()
50 v += div64_u64_rem(x, tile->width, &x) << tile->size; in tiled_offset()
52 } else if (tile->width == 128) { in tiled_offset()
68 switch (tile->swizzle) { in tiled_offset()
[all …]
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| /netbsd-src/external/apache2/llvm/dist/clang/lib/Headers/ |
| H A D | amxintrin.h | 133 #define _tile_zero(tile) __builtin_ia32_tilezero((tile)) argument
273 __SIZE_TYPE__ stride, _tile1024i tile) { in _tile_stored_internal() argument
275 (__SIZE_TYPE__)(stride), tile); in _tile_stored_internal()
292 _tile1024i tile; member
311 dst->tile = _tile_loadd_internal(dst->row, dst->col, base, stride); in __tile_loadd()
333 dst->tile = _tile_dpbssd_internal(src0.row, src1.col, src0.col, dst->tile, in __tile_dpbssd()
334 src0.tile, src1.tile); in __tile_dpbssd()
356 dst->tile = _tile_dpbsud_internal(src0.row, src1.col, src0.col, dst->tile, in __tile_dpbsud()
357 src0.tile, src1.tile); in __tile_dpbsud()
379 dst->tile = _tile_dpbusd_internal(src0.row, src1.col, src0.col, dst->tile, in __tile_dpbusd()
[all …]
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| /netbsd-src/sys/external/bsd/drm2/dist/drm/nouveau/nvkm/engine/gr/ |
| H A D | nouveau_nvkm_engine_gr_nv44.c | 36 nv44_gr_tile(struct nvkm_gr *base, int i, struct nvkm_fb_tile *tile) in nv44_gr_tile() argument
49 nvkm_wr32(device, NV20_PGRAPH_TSIZE(i), tile->pitch); in nv44_gr_tile()
50 nvkm_wr32(device, NV20_PGRAPH_TLIMIT(i), tile->limit); in nv44_gr_tile()
51 nvkm_wr32(device, NV20_PGRAPH_TILE(i), tile->addr); in nv44_gr_tile()
58 nvkm_wr32(device, NV47_PGRAPH_TSIZE(i), tile->pitch); in nv44_gr_tile()
59 nvkm_wr32(device, NV47_PGRAPH_TLIMIT(i), tile->limit); in nv44_gr_tile()
60 nvkm_wr32(device, NV47_PGRAPH_TILE(i), tile->addr); in nv44_gr_tile()
61 nvkm_wr32(device, NV40_PGRAPH_TSIZE1(i), tile->pitch); in nv44_gr_tile()
62 nvkm_wr32(device, NV40_PGRAPH_TLIMIT1(i), tile->limit); in nv44_gr_tile()
63 nvkm_wr32(device, NV40_PGRAPH_TILE1(i), tile->addr); in nv44_gr_tile()
[all …]
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| H A D | nouveau_nvkm_engine_gr_nv40.c | 178 nv40_gr_tile(struct nvkm_gr *base, int i, struct nvkm_fb_tile *tile) in nv40_gr_tile() argument
194 nvkm_wr32(device, NV20_PGRAPH_TSIZE(i), tile->pitch); in nv40_gr_tile()
195 nvkm_wr32(device, NV20_PGRAPH_TLIMIT(i), tile->limit); in nv40_gr_tile()
196 nvkm_wr32(device, NV20_PGRAPH_TILE(i), tile->addr); in nv40_gr_tile()
197 nvkm_wr32(device, NV40_PGRAPH_TSIZE1(i), tile->pitch); in nv40_gr_tile()
198 nvkm_wr32(device, NV40_PGRAPH_TLIMIT1(i), tile->limit); in nv40_gr_tile()
199 nvkm_wr32(device, NV40_PGRAPH_TILE1(i), tile->addr); in nv40_gr_tile()
203 nvkm_wr32(device, NV20_PGRAPH_ZCOMP(i), tile->zcomp); in nv40_gr_tile()
204 nvkm_wr32(device, NV40_PGRAPH_ZCOMP1(i), tile->zcomp); in nv40_gr_tile()
209 nvkm_wr32(device, NV41_PGRAPH_ZCOMP0(i), tile->zcomp); in nv40_gr_tile()
[all …]
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| /netbsd-src/external/gpl3/gdb/dist/sim/testsuite/frv/ |
| H A D | tile.cgs | 1 # frv testcase for tile $ICCi_2,$GRi,$s12
8 .global tile
9 tile:
20 tile icc0,gr7,4 ; should branch to tbr + (128 + 4)*16
24 tile icc0,gr7,4 ; should branch to tbr + (128 + 4)*16
29 tile icc0,gr7,4 ; should branch to tbr + (128 + 4)*16
35 tile icc0,gr7,4 ; should branch to tbr + (128 + 4)*16
41 tile icc0,gr7,4 ; should branch to tbr + (128 + 4)*16
47 tile icc0,gr7,4 ; should branch to tbr + (128 + 4)*16
53 tile icc0,gr7,4 ; should branch to tbr + (128 + 4)*16
[all …]
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| /netbsd-src/sys/external/bsd/drm2/dist/drm/amd/amdgpu/ |
| H A D | amdgpu_gfx_v7_0.c | 1038 uint32_t *tile, *macrotile; in gfx_v7_0_tiling_mode_table_init() local
1040 tile = adev->gfx.config.tile_mode_array; in gfx_v7_0_tiling_mode_table_init()
1057 tile[reg_offset] = 0; in gfx_v7_0_tiling_mode_table_init()
1063 tile[0] = (ARRAY_MODE(ARRAY_2D_TILED_THIN1) | in gfx_v7_0_tiling_mode_table_init()
1067 tile[1] = (ARRAY_MODE(ARRAY_2D_TILED_THIN1) | in gfx_v7_0_tiling_mode_table_init()
1071 tile[2] = (ARRAY_MODE(ARRAY_2D_TILED_THIN1) | in gfx_v7_0_tiling_mode_table_init()
1075 tile[3] = (ARRAY_MODE(ARRAY_2D_TILED_THIN1) | in gfx_v7_0_tiling_mode_table_init()
1079 tile[4] = (ARRAY_MODE(ARRAY_2D_TILED_THIN1) | in gfx_v7_0_tiling_mode_table_init()
1083 tile[5] = (ARRAY_MODE(ARRAY_1D_TILED_THIN1) | in gfx_v7_0_tiling_mode_table_init()
1086 tile[6] = (ARRAY_MODE(ARRAY_PRT_TILED_THIN1) | in gfx_v7_0_tiling_mode_table_init()
[all …]
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| /netbsd-src/external/apache2/llvm/dist/clang/include/clang/Basic/ |
| H A D | BuiltinsX86_64.def | 104 TARGET_BUILTIN(__builtin_ia32_tile_loadconfig_internal, "vvC*", "n", "amx-tile")
105 TARGET_BUILTIN(__builtin_ia32_tileloadd64_internal, "V256iUsUsvC*z", "n", "amx-tile")
110 TARGET_BUILTIN(__builtin_ia32_tilestored64_internal, "vUsUsv*zV256i", "n", "amx-tile")
111 TARGET_BUILTIN(__builtin_ia32_tilezero_internal, "V256iUsUs", "n", "amx-tile")
114 TARGET_BUILTIN(__builtin_ia32_tile_loadconfig, "vvC*", "n", "amx-tile")
115 TARGET_BUILTIN(__builtin_ia32_tile_storeconfig, "vvC*", "n", "amx-tile")
116 TARGET_BUILTIN(__builtin_ia32_tilerelease, "v", "n", "amx-tile")
117 TARGET_BUILTIN(__builtin_ia32_tilezero, "vUc", "n", "amx-tile")
119 TARGET_BUILTIN(__builtin_ia32_tileloadd64, "vIUcvC*z", "n", "amx-tile")
120 TARGET_BUILTIN(__builtin_ia32_tileloaddt164, "vIUcvC*z", "n", "amx-tile")
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| /netbsd-src/external/gpl3/gcc.old/dist/gcc/config/tilepro/ |
| H A D | tilepro-generic.md | 21 (define_automaton "tile")
27 (define_cpu_unit "X0" "tile")
28 (define_cpu_unit "X1" "tile")
29 (define_cpu_unit "Y0" "tile")
30 (define_cpu_unit "Y1" "tile")
31 (define_cpu_unit "Y2" "tile")
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| /netbsd-src/external/gpl3/gcc/dist/gcc/config/tilepro/ |
| H A D | tilepro-generic.md | 21 (define_automaton "tile")
27 (define_cpu_unit "X0" "tile")
28 (define_cpu_unit "X1" "tile")
29 (define_cpu_unit "Y0" "tile")
30 (define_cpu_unit "Y1" "tile")
31 (define_cpu_unit "Y2" "tile")
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| /netbsd-src/external/gpl3/gcc.old/dist/gcc/config/tilegx/ |
| H A D | tilegx-generic.md | 21 (define_automaton "tile")
27 (define_cpu_unit "X0" "tile")
28 (define_cpu_unit "X1" "tile")
29 (define_cpu_unit "Y0" "tile")
30 (define_cpu_unit "Y1" "tile")
31 (define_cpu_unit "Y2" "tile")
|