| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/Hexagon/ |
| H A D | HexagonCFGOptimizer.cpp | 104 MI.getOperand(1).setMBB(NewTarget); in InvertAndChangeJumpTarget()
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| H A D | HexagonInstrInfo.cpp | 628 Loop->getOperand(0).setMBB(TBB); in insertBranch()
670 Loop->getOperand(0).setMBB(TBB); in insertBranch()
4560 MI.getOperand(TargetPos).setMBB(NewTarget); in invertAndChangeJumpTarget()
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| /netbsd-src/external/apache2/llvm/dist/llvm/include/llvm/CodeGen/ |
| H A D | MachineOperand.h | 689 void setMBB(MachineBasicBlock *MBB) { in setMBB() function
819 Op.setMBB(MBB);
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/AMDGPU/ |
| H A D | AMDGPUPreLegalizerCombiner.cpp | 126 B.setMBB(*MI.getParent()); in applyClampI64ToI16()
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| H A D | AMDGPUMachineCFGStructurizer.cpp | 296 PHI.getOperand(Index * 2 + 2).setMBB(NewPred); in setPhiPred()
1269 UI.setMBB(Succ); in fixMBBTerminator()
1303 UI.setMBB(ExternalSucc); in fixRegionTerminator()
2539 UI.setMBB(EntrySucc); in splitEntry()
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| H A D | AMDILCFGStructurizer.cpp | 535 MI->getOperand(0).setMBB(MBB); in setTrueBranch()
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/CodeGen/GlobalISel/ |
| H A D | RegBankSelect.cpp | 701 MIRBuilder.setMBB(*MBB); in runOnMachineFunction()
739 MIRBuilder.setMBB(*MBB); in runOnMachineFunction()
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| H A D | IRTranslator.cpp | 751 MIB.setMBB(*MBB); in emitJumpTable()
765 MIB.setMBB(*HeaderBB); in emitJumpTableHeader()
812 MIB.setMBB(*CB.ThisBB); in emitSwitchCase()
994 MIB.setMBB(*SwitchBB); in emitBitTestHeader()
1047 MIB.setMBB(*SwitchBB); in emitBitTestCase()
3114 EntryBuilder->setMBB(*EntryBB); in runOnMachineFunction()
3188 CurBuilder->setMBB(MBB); in runOnMachineFunction()
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| /netbsd-src/external/apache2/llvm/dist/llvm/tools/llvm-exegesis/lib/ |
| H A D | Assembler.cpp | 131 MIB.setMBB(*MBB); in addReturn()
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/WebAssembly/ |
| H A D | WebAssemblyFixIrreducibleControlFlow.cpp | 468 Op.setMBB(Map[{Op.getMBB(), PredInLoop}]); in makeSingleEntryLoop()
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| H A D | WebAssemblyCFGStackify.cpp | 1446 MO.setMBB(BrDest); in fixCatchUnwindMismatches()
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/CodeGen/ |
| H A D | TailDuplicator.cpp | 523 MI.getOperand(Idx + 1).setMBB(SrcBB); in updateSuccessorsPHIs()
535 MI.getOperand(Idx + 1).setMBB(SrcBB); in updateSuccessorsPHIs()
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| H A D | MachineBasicBlock.cpp | 1379 I->getOperand(i).setMBB(New); in ReplaceUsesOfBlockWith()
1392 MO.setMBB(New); in replacePhiUsesWith()
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| H A D | EarlyIfConversion.cpp | 665 PI.PHI->getOperand(i-1).setMBB(Head); in rewritePHIOperands()
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| H A D | TargetInstrInfo.cpp | 352 MO.setMBB(Pred[j].getMBB()); in PredicateInstruction()
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/PowerPC/ |
| H A D | PPCBranchCoalescing.cpp | 411 MO.setMBB(TargetMBB); in moveAndUpdatePHIs()
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| H A D | PPCReduceCRLogicals.cpp | 71 MO.setMBB(NewMBB); in updatePHIs()
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/X86/ |
| H A D | X86CallLowering.cpp | 282 MIRBuilder.setMBB(MBB); in lowerFormalArguments()
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| H A D | X86SpeculativeLoadHardening.cpp | 243 Br->getOperand(0).setMBB(&NewMBB); in splitEdge()
300 OpMBB.setMBB(&NewMBB); in splitEdge()
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| H A D | X86FlagsCopyLowering.cpp | 324 OpMBB.setMBB(&NewMBB); in splitBlock()
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/Mips/ |
| H A D | MipsConstantIslandPass.cpp | 1587 BMI->getOperand(BMITargetOperand).setMBB(DestBB); in fixupConditionalBr()
1588 MI->getOperand(TargetOperand).setMBB(NewDest); in fixupConditionalBr()
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| /netbsd-src/external/apache2/llvm/dist/llvm/include/llvm/CodeGen/GlobalISel/ |
| H A D | MachineIRBuilder.h | 332 void setMBB(MachineBasicBlock &MBB) { in setMBB() function
343 setMBB(*MI.getParent()); in setInstr()
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/ARM/ |
| H A D | ARMCallLowering.cpp | 415 MIRBuilder.setMBB(MBB); in lowerFormalArguments()
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| H A D | ARMConstantIslandPass.cpp | 1728 BMI->getOperand(0).setMBB(DestBB); in fixupConditionalBr()
1729 MI->getOperand(0).setMBB(NewDest); in fixupConditionalBr()
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/AArch64/GISel/ |
| H A D | AArch64CallLowering.cpp | 606 MIRBuilder.setMBB(MBB); in lowerFormalArguments()
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