| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/AVR/ |
| H A D | AVRISelLowering.cpp | 117 setIndexedLoadAction(ISD::POST_INC, MVT::i8, Legal); in AVRTargetLowering()
118 setIndexedLoadAction(ISD::POST_INC, MVT::i16, Legal); in AVRTargetLowering()
119 setIndexedLoadAction(ISD::PRE_DEC, MVT::i8, Legal); in AVRTargetLowering()
120 setIndexedLoadAction(ISD::PRE_DEC, MVT::i16, Legal); in AVRTargetLowering()
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/MSP430/ |
| H A D | MSP430ISelLowering.cpp | 61 setIndexedLoadAction(ISD::POST_INC, MVT::i8, Legal); in MSP430TargetLowering()
62 setIndexedLoadAction(ISD::POST_INC, MVT::i16, Legal); in MSP430TargetLowering()
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/CodeGen/ |
| H A D | TargetLoweringBase.cpp | 730 setIndexedLoadAction(IM, VT, Expand); in initActions()
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/AArch64/ |
| H A D | AArch64ISelLowering.cpp | 846 setIndexedLoadAction(im, MVT::i8, Legal); in AArch64TargetLowering()
847 setIndexedLoadAction(im, MVT::i16, Legal); in AArch64TargetLowering()
848 setIndexedLoadAction(im, MVT::i32, Legal); in AArch64TargetLowering()
849 setIndexedLoadAction(im, MVT::i64, Legal); in AArch64TargetLowering()
850 setIndexedLoadAction(im, MVT::f64, Legal); in AArch64TargetLowering()
851 setIndexedLoadAction(im, MVT::f32, Legal); in AArch64TargetLowering()
852 setIndexedLoadAction(im, MVT::f16, Legal); in AArch64TargetLowering()
853 setIndexedLoadAction(im, MVT::bf16, Legal); in AArch64TargetLowering()
1427 setIndexedLoadAction(im, VT, Legal); in addTypeForNEON()
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/PowerPC/ |
| H A D | PPCISelLowering.cpp | 199 setIndexedLoadAction(ISD::PRE_INC, MVT::i1, Legal); in PPCTargetLowering()
200 setIndexedLoadAction(ISD::PRE_INC, MVT::i8, Legal); in PPCTargetLowering()
201 setIndexedLoadAction(ISD::PRE_INC, MVT::i16, Legal); in PPCTargetLowering()
202 setIndexedLoadAction(ISD::PRE_INC, MVT::i32, Legal); in PPCTargetLowering()
203 setIndexedLoadAction(ISD::PRE_INC, MVT::i64, Legal); in PPCTargetLowering()
210 setIndexedLoadAction(ISD::PRE_INC, MVT::f32, Legal); in PPCTargetLowering()
211 setIndexedLoadAction(ISD::PRE_INC, MVT::f64, Legal); in PPCTargetLowering()
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| /netbsd-src/external/apache2/llvm/dist/llvm/include/llvm/CodeGen/ |
| H A D | TargetLowering.h | 2196 void setIndexedLoadAction(unsigned IdxMode, MVT VT, LegalizeAction Action) { in setIndexedLoadAction() function
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/ARM/ |
| H A D | ARMISelLowering.cpp | 317 setIndexedLoadAction(im, VT, Legal); in addMVEVectorTypes()
347 setIndexedLoadAction(im, VT, Legal); in addMVEVectorTypes()
428 setIndexedLoadAction(im, VT, Legal); in addMVEVectorTypes()
1083 setIndexedLoadAction(im, MVT::i1, Legal); in ARMTargetLowering()
1084 setIndexedLoadAction(im, MVT::i8, Legal); in ARMTargetLowering()
1085 setIndexedLoadAction(im, MVT::i16, Legal); in ARMTargetLowering()
1086 setIndexedLoadAction(im, MVT::i32, Legal); in ARMTargetLowering()
1094 setIndexedLoadAction(ISD::POST_INC, MVT::i32, Legal); in ARMTargetLowering()
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/Hexagon/ |
| H A D | HexagonISelLoweringHVX.cpp | 86 setIndexedLoadAction(ISD::POST_INC, T, Legal); in initializeHVXLowering()
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| H A D | HexagonISelLowering.cpp | 1781 setIndexedLoadAction(ISD::POST_INC, VT, Legal); in HexagonTargetLowering()
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| /netbsd-src/external/apache2/llvm/dist/llvm/docs/ |
| H A D | WritingAnLLVMBackend.rst | 1372 * ``setIndexedLoadAction`` --- Indexed load.
|