| /netbsd-src/sys/external/bsd/drm2/dist/drm/amd/amdgpu/ |
| H A D | amdgpu_sdma.c | 46 for (i = 0; i < adev->sdma.num_instances; i++) in amdgpu_sdma_get_instance_from_ring()
47 if (ring == &adev->sdma.instance[i].ring || in amdgpu_sdma_get_instance_from_ring()
48 ring == &adev->sdma.instance[i].page) in amdgpu_sdma_get_instance_from_ring()
49 return &adev->sdma.instance[i]; in amdgpu_sdma_get_instance_from_ring()
59 for (i = 0; i < adev->sdma.num_instances; i++) { in amdgpu_sdma_get_index_from_ring()
60 if (ring == &adev->sdma.instance[i].ring || in amdgpu_sdma_get_index_from_ring()
61 ring == &adev->sdma.instance[i].page) { in amdgpu_sdma_get_index_from_ring()
106 if (!adev->sdma.ras_if) { in amdgpu_sdma_ras_late_init()
107 adev->sdma.ras_if = kmalloc(sizeof(struct ras_common_if), GFP_KERNEL); in amdgpu_sdma_ras_late_init()
108 if (!adev->sdma.ras_if) in amdgpu_sdma_ras_late_init()
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| H A D | amdgpu_sdma_v4_0.c | 524 for (i = 0; i < adev->sdma.num_instances; i++) { in sdma_v4_0_destroy_inst_ctx()
525 if (adev->sdma.instance[i].fw != NULL) in sdma_v4_0_destroy_inst_ctx()
526 release_firmware(adev->sdma.instance[i].fw); in sdma_v4_0_destroy_inst_ctx()
534 memset((void*)adev->sdma.instance, 0, in sdma_v4_0_destroy_inst_ctx()
590 err = request_firmware(&adev->sdma.instance[0].fw, fw_name, adev->dev); in sdma_v4_0_init_microcode()
594 err = sdma_v4_0_init_inst_ctx(&adev->sdma.instance[0]); in sdma_v4_0_init_microcode()
598 for (i = 1; i < adev->sdma.num_instances; i++) { in sdma_v4_0_init_microcode()
602 memcpy((void*)&adev->sdma.instance[i], in sdma_v4_0_init_microcode()
603 (void*)&adev->sdma.instance[0], in sdma_v4_0_init_microcode()
609 err = request_firmware(&adev->sdma.instance[i].fw, fw_name, adev->dev); in sdma_v4_0_init_microcode()
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| H A D | amdgpu_sdma_v3_0.c | 259 for (i = 0; i < adev->sdma.num_instances; i++) { in sdma_v3_0_free_microcode()
260 release_firmware(adev->sdma.instance[i].fw); in sdma_v3_0_free_microcode()
261 adev->sdma.instance[i].fw = NULL; in sdma_v3_0_free_microcode()
313 for (i = 0; i < adev->sdma.num_instances; i++) { in sdma_v3_0_init_microcode()
318 err = request_firmware(&adev->sdma.instance[i].fw, fw_name, adev->dev); in sdma_v3_0_init_microcode()
321 err = amdgpu_ucode_validate(adev->sdma.instance[i].fw); in sdma_v3_0_init_microcode()
324 hdr = (const struct sdma_firmware_header_v1_0 *)adev->sdma.instance[i].fw->data; in sdma_v3_0_init_microcode()
325 adev->sdma.instance[i].fw_version = le32_to_cpu(hdr->header.ucode_version); in sdma_v3_0_init_microcode()
326 adev->sdma.instance[i].feature_version = le32_to_cpu(hdr->ucode_feature_version); in sdma_v3_0_init_microcode()
327 if (adev->sdma.instance[i].feature_version >= 20) in sdma_v3_0_init_microcode()
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| H A D | amdgpu_cik_sdma.c | 81 for (i = 0; i < adev->sdma.num_instances; i++) { in cik_sdma_free_microcode()
82 release_firmware(adev->sdma.instance[i].fw); in cik_sdma_free_microcode()
83 adev->sdma.instance[i].fw = NULL; in cik_sdma_free_microcode()
140 for (i = 0; i < adev->sdma.num_instances; i++) { in cik_sdma_init_microcode()
145 err = request_firmware(&adev->sdma.instance[i].fw, fw_name, adev->dev); in cik_sdma_init_microcode()
148 err = amdgpu_ucode_validate(adev->sdma.instance[i].fw); in cik_sdma_init_microcode()
153 for (i = 0; i < adev->sdma.num_instances; i++) { in cik_sdma_init_microcode()
154 release_firmware(adev->sdma.instance[i].fw); in cik_sdma_init_microcode()
155 adev->sdma.instance[i].fw = NULL; in cik_sdma_init_microcode()
208 struct amdgpu_sdma_instance *sdma = amdgpu_sdma_get_instance_from_ring(ring); in cik_sdma_ring_insert_nop() local
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| H A D | amdgpu_sdma_v2_4.c | 122 for (i = 0; i < adev->sdma.num_instances; i++) { in sdma_v2_4_free_microcode()
123 release_firmware(adev->sdma.instance[i].fw); in sdma_v2_4_free_microcode()
124 adev->sdma.instance[i].fw = NULL; in sdma_v2_4_free_microcode()
155 for (i = 0; i < adev->sdma.num_instances; i++) { in sdma_v2_4_init_microcode()
160 err = request_firmware(&adev->sdma.instance[i].fw, fw_name, adev->dev); in sdma_v2_4_init_microcode()
163 err = amdgpu_ucode_validate(adev->sdma.instance[i].fw); in sdma_v2_4_init_microcode()
166 hdr = (const struct sdma_firmware_header_v1_0 *)adev->sdma.instance[i].fw->data; in sdma_v2_4_init_microcode()
167 adev->sdma.instance[i].fw_version = le32_to_cpu(hdr->header.ucode_version); in sdma_v2_4_init_microcode()
168 adev->sdma.instance[i].feature_version = le32_to_cpu(hdr->ucode_feature_version); in sdma_v2_4_init_microcode()
169 if (adev->sdma.instance[i].feature_version >= 20) in sdma_v2_4_init_microcode()
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| H A D | amdgpu_sdma_v5_0.c | 200 for (i = 0; i < adev->sdma.num_instances; i++) { in sdma_v5_0_init_microcode()
205 err = request_firmware(&adev->sdma.instance[i].fw, fw_name, adev->dev); in sdma_v5_0_init_microcode()
208 err = amdgpu_ucode_validate(adev->sdma.instance[i].fw); in sdma_v5_0_init_microcode()
211 hdr = (const struct sdma_firmware_header_v1_0 *)adev->sdma.instance[i].fw->data; in sdma_v5_0_init_microcode()
212 adev->sdma.instance[i].fw_version = le32_to_cpu(hdr->header.ucode_version); in sdma_v5_0_init_microcode()
213 adev->sdma.instance[i].feature_version = le32_to_cpu(hdr->ucode_feature_version); in sdma_v5_0_init_microcode()
214 if (adev->sdma.instance[i].feature_version >= 20) in sdma_v5_0_init_microcode()
215 adev->sdma.instance[i].burst_nop = true; in sdma_v5_0_init_microcode()
222 info->fw = adev->sdma.instance[i].fw; in sdma_v5_0_init_microcode()
231 for (i = 0; i < adev->sdma.num_instances; i++) { in sdma_v5_0_init_microcode()
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| H A D | amdgpu_si_dma.c | 54 u32 me = (ring == &adev->sdma.instance[0].ring) ? 0 : 1; in si_dma_ring_get_wptr()
62 u32 me = (ring == &adev->sdma.instance[0].ring) ? 0 : 1; in si_dma_ring_set_wptr()
123 for (i = 0; i < adev->sdma.num_instances; i++) { in si_dma_stop()
124 ring = &adev->sdma.instance[i].ring; in si_dma_stop()
143 for (i = 0; i < adev->sdma.num_instances; i++) { in si_dma_start()
144 ring = &adev->sdma.instance[i].ring; in si_dma_start()
475 adev->sdma.num_instances = 2; in si_dma_early_init()
493 &adev->sdma.trap_irq); in si_dma_sw_init()
499 &adev->sdma.trap_irq); in si_dma_sw_init()
503 for (i = 0; i < adev->sdma.num_instances; i++) { in si_dma_sw_init()
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| /netbsd-src/sys/external/gpl2/dts/dist/arch/arm/boot/dts/ |
| H A D | omap2.dtsi | 65 dmas = <&sdma 9 &sdma 10>;
103 sdma: dma-controller@0 { label
104 compatible = "ti,omap2420-sdma", "ti,omap-sdma";
139 dmas = <&sdma 35 &sdma 36 &sdma 37 &sdma 38
140 &sdma 39 &sdma 40 &sdma 41 &sdma 42>;
150 dmas = <&sdma 43 &sdma 44 &sdma 45 &sdma 46>;
166 dmas = <&sdma 13>;
175 dmas = <&sdma 49 &sdma 50>;
185 dmas = <&sdma 51 &sdma 52>;
195 dmas = <&sdma 53 &sdma 54>;
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| H A D | omap3.dtsi | 184 dmas = <&sdma 9 &sdma 10>;
210 dmas = <&sdma 65 &sdma 66>;
292 sdma: dma-controller@0 { label
293 compatible = "ti,omap3430-sdma", "ti,omap-sdma";
376 dmas = <&sdma 49 &sdma 50>;
386 dmas = <&sdma 51 &sdma 52>;
396 dmas = <&sdma 53 &sdma 54>;
451 dmas = <&sdma 35>,
452 <&sdma 36>,
453 <&sdma 37>,
[all …]
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| H A D | omap2430.dtsi | 189 dmas = <&sdma 31>,
190 <&sdma 32>;
205 dmas = <&sdma 33>,
206 <&sdma 34>;
221 dmas = <&sdma 17>,
222 <&sdma 18>;
237 dmas = <&sdma 19>,
238 <&sdma 20>;
253 dmas = <&sdma 21>,
254 <&sdma 22>;
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| H A D | imx31.dtsi | 135 dmas = <&sdma 8 8 0>, <&sdma 9 8 0>;
182 dmas = <&sdma 20 3 0>;
193 dmas = <&sdma 21 3 0>;
213 dmas = <&sdma 6 8 0>, <&sdma 7 8 0>;
248 dmas = <&sdma 10 8 0>, <&sdma 11 8 0>;
300 sdma: sdma@53fd4000 { label
301 compatible = "fsl,imx31-sdma";
307 fsl,sdma-ram-script-name = "imx/sdma/sdma-imx31.bin";
348 dmas = <&sdma 30 17 0>;
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| H A D | imx6sll.dtsi | 159 dmas = <&sdma 14 18 0>, <&sdma 15 18 0>;
183 dmas = <&sdma 3 7 1>, <&sdma 4 7 2>;
195 dmas = <&sdma 5 7 1>, <&sdma 6 7 2>;
207 dmas = <&sdma 7 7 1>, <&sdma 8 7 2>;
219 dmas = <&sdma 9 7 1>, <&sdma 10 7 2>;
232 dmas = <&sdma 31 4 0>, <&sdma 32 4 0>;
245 dmas = <&sdma 25 4 0>, <&sdma 26 4 0>;
258 dmas = <&sdma 27 4 0>, <&sdma 28 4 0>;
270 dmas = <&sdma 37 22 0>, <&sdma 38 22 0>;
283 dmas = <&sdma 41 22 0>, <&sdma 42 22 0>;
[all …]
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| H A D | imx6qdl.dtsi | 312 dmas = <&sdma 14 18 0>,
313 <&sdma 15 18 0>;
337 dmas = <&sdma 3 7 1>, <&sdma 4 7 2>;
351 dmas = <&sdma 5 7 1>, <&sdma 6 7 2>;
365 dmas = <&sdma 7 7 1>, <&sdma 8 7 2>;
379 dmas = <&sdma 9 7 1>, <&sdma 10 7 2>;
391 dmas = <&sdma 25 4 0>, <&sdma 26 4 0>;
407 dmas = <&sdma 23 21 0>, <&sdma 24 21 0>;
421 dmas = <&sdma 37 1 0>,
422 <&sdma 38 1 0>;
[all …]
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| H A D | imx53.dtsi | 270 dmas = <&sdma 42 4 0>, <&sdma 43 4 0>;
297 dmas = <&sdma 24 1 0>,
298 <&sdma 25 1 0>;
554 dmas = <&sdma 18 4 0>, <&sdma 19 4 0>;
566 dmas = <&sdma 12 4 0>, <&sdma 13 4 0>;
652 dmas = <&sdma 2 4 0>, <&sdma 3 4 0>;
684 dmas = <&sdma 16 4 0>, <&sdma 17 4 0>;
713 sdma: sdma@63fb0000 { label
714 compatible = "fsl,imx53-sdma", "fsl,imx35-sdma";
721 fsl,sdma-ram-script-name = "imx/sdma/sdma-imx53.bin";
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| H A D | imx6sx.dtsi | 257 dmas = <&sdma 14 18 0>,
258 <&sdma 15 18 0>;
331 dmas = <&sdma 25 4 0>, <&sdma 26 4 0>;
347 dmas = <&sdma 23 21 0>,
348 <&sdma 24 21 0>;
361 dmas = <&sdma 37 1 0>, <&sdma 38 1 0>;
375 dmas = <&sdma 41 1 0>, <&sdma 42 1 0>;
389 dmas = <&sdma 45 1 0>, <&sdma 46 1 0>;
411 dmas = <&sdma 17 23 1>, <&sdma 18 23 1>,
412 <&sdma 19 23 1>, <&sdma 20 23 1>,
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| H A D | imx6sl.dtsi | 161 dmas = <&sdma 14 18 0>,
162 <&sdma 15 18 0>;
233 dmas = <&sdma 33 4 0>, <&sdma 34 4 0>;
246 dmas = <&sdma 25 4 0>, <&sdma 26 4 0>;
259 dmas = <&sdma 27 4 0>, <&sdma 28 4 0>;
273 dmas = <&sdma 37 1 0>,
274 <&sdma 38 1 0>;
289 dmas = <&sdma 41 1 0>,
290 <&sdma 42 1 0>;
305 dmas = <&sdma 45 1 0>,
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| H A D | imx6ul.dtsi | 222 dmas = <&sdma 3 7 1>, <&sdma 4 7 2>;
236 dmas = <&sdma 5 7 1>, <&sdma 6 7 2>;
250 dmas = <&sdma 7 7 1>, <&sdma 8 7 2>;
264 dmas = <&sdma 9 7 1>, <&sdma 10 7 2>;
311 dmas = <&sdma 35 24 0>,
312 <&sdma 36 24 0>;
326 dmas = <&sdma 37 24 0>,
327 <&sdma 38 24 0>;
341 dmas = <&sdma 39 24 0>,
342 <&sdma 40 24 0>;
[all …]
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| H A D | imx50.dtsi | 172 dmas = <&sdma 24 1 0>,
173 <&sdma 25 1 0>;
424 sdma: sdma@63fb0000 { label
425 compatible = "fsl,imx50-sdma", "fsl,imx35-sdma";
432 fsl,sdma-ram-script-name = "imx/sdma/sdma-imx50.bin";
474 dmas = <&sdma 28 0 0>,
475 <&sdma 29 0 0>;
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| H A D | imx51.dtsi | 241 dmas = <&sdma 24 1 0>,
242 <&sdma 25 1 0>;
501 sdma: sdma@83fb0000 { label
502 compatible = "fsl,imx51-sdma", "fsl,imx35-sdma";
509 fsl,sdma-ram-script-name = "imx/sdma/sdma-imx51.bin";
552 dmas = <&sdma 28 0 0>,
553 <&sdma 29 0 0>;
615 dmas = <&sdma 46 0 0>,
616 <&sdma 47 0 0>;
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| H A D | omap2420.dtsi | 162 dmas = <&sdma 31>,
163 <&sdma 32>;
176 dmas = <&sdma 33>,
177 <&sdma 34>;
187 dmas = <&sdma 61 &sdma 62>;
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| H A D | imx35.dtsi | 133 dmas = <&sdma 28 0 0>,
134 <&sdma 29 0 0>;
287 sdma: sdma@53fd4000 { label
288 compatible = "fsl,imx35-sdma";
294 fsl,sdma-ram-script-name = "imx/sdma/sdma-imx35.bin";
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| H A D | imx25.dtsi | 257 dmas = <&sdma 24 1 0>,
258 <&sdma 25 1 0>;
318 dmas = <&sdma 28 1 0>,
319 <&sdma 29 1 0>;
518 sdma: sdma@53fd4000 { label
519 compatible = "fsl,imx25-sdma";
525 fsl,sdma-ram-script-name = "imx/sdma/sdma-imx25.bin";
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| H A D | omap4-l4-abe.dtsi | 115 dmas = <&sdma 33>,
116 <&sdma 34>;
148 dmas = <&sdma 17>,
149 <&sdma 18>;
181 dmas = <&sdma 19>,
182 <&sdma 20>;
214 dmas = <&sdma 8>;
249 dmas = <&sdma 67>;
311 dmas = <&sdma 65>,
312 <&sdma 66>;
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| H A D | imx6sx-sdb-sai.dts | 22 &sdma {
25 fsl,sdma-event-remap = <0 15 1>, <0 16 1>;
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| H A D | omap5-l4-abe.dtsi | 115 dmas = <&sdma 33>,
116 <&sdma 34>;
148 dmas = <&sdma 17>,
149 <&sdma 18>;
181 dmas = <&sdma 19>,
182 <&sdma 20>;
231 dmas = <&sdma 67>;
274 dmas = <&sdma 65>,
275 <&sdma 66>;
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