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Searched refs:sc_cacheline (Results 1 – 9 of 9) sorted by relevance

/netbsd-src/sys/arch/newsmips/apbus/
H A Dif_tlp_ap.c158 sc->sc_cacheline = mips_cache_info.mci_sdcache_line_size / 4; in tlp_ap_attach()
160 sc->sc_cacheline = mips_cache_info.mci_pdcache_line_size / 4; in tlp_ap_attach()
162 sc->sc_cacheline = 4; in tlp_ap_attach()
163 sc->sc_maxburst = sc->sc_cacheline; /* XXX */ in tlp_ap_attach()
/netbsd-src/sys/dev/eisa/
H A Dif_tlp_eisa.c208 sc->sc_cacheline = 0; in tlp_eisa_attach()
/netbsd-src/sys/dev/cardbus/
H A Dcardbusvar.h141 int sc_cacheline; /* cache line size */ member
H A Dcardbus.c115 sc->sc_cacheline = cba->cba_cacheline; in cardbusattach()
122 sc->sc_cacheline, sc->sc_max_lattimer); in cardbusattach()
546 bhlc |= (sc->sc_cacheline & PCI_CACHELINE_MASK) << in cardbus_rescan()
/netbsd-src/sys/dev/pci/
H A Dif_atw_pci.c238 sc->sc_cacheline = PCI_CACHELINE(pci_conf_read(pc, pa->pa_tag, in atw_pci_attach()
H A Dif_tlp_pci.c576 sc->sc_cacheline = PCI_CACHELINE(pci_conf_read(pc, pa->pa_tag, in tlp_pci_attach()
/netbsd-src/sys/dev/ic/
H A Dtulipvar.h361 uint32_t sc_cacheline; /* cache line size */ member
H A Datwvar.h192 u_int32_t sc_cacheline; /* cache line size */ member
H A Dtulip.c1663 switch (sc->sc_cacheline) { in tlp_init()