Searched refs:sOutput (Results 1 – 5 of 5) sorted by relevance
439 adjusted_clock = le32_to_cpu(args.v3.sOutput.ulDispPllFreq) * 10; in amdgpu_atombios_crtc_adjust_pll()440 if (args.v3.sOutput.ucRefDiv) { in amdgpu_atombios_crtc_adjust_pll()443 amdgpu_crtc->pll_reference_div = args.v3.sOutput.ucRefDiv; in amdgpu_atombios_crtc_adjust_pll()445 if (args.v3.sOutput.ucPostDiv) { in amdgpu_atombios_crtc_adjust_pll()448 amdgpu_crtc->pll_post_div = args.v3.sOutput.ucPostDiv; in amdgpu_atombios_crtc_adjust_pll()
742 adjusted_clock = le32_to_cpu(args.v3.sOutput.ulDispPllFreq) * 10; in atombios_adjust_pll()743 if (args.v3.sOutput.ucRefDiv) { in atombios_adjust_pll()746 radeon_crtc->pll_reference_div = args.v3.sOutput.ucRefDiv; in atombios_adjust_pll()748 if (args.v3.sOutput.ucPostDiv) { in atombios_adjust_pll()751 radeon_crtc->pll_post_div = args.v3.sOutput.ucPostDiv; in atombios_adjust_pll()
1795 ADJUST_DISPLAY_PLL_OUTPUT_PARAMETERS_V3 sOutput; member
1513 (uint64_t)le32_to_cpu(params.sOutput.ulDispPllFreq); in adjust_display_pll_v3()1525 bp_params->reference_divider = params.sOutput.ucRefDiv; in adjust_display_pll_v3()1526 bp_params->pixel_clock_post_divider = params.sOutput.ucPostDiv; in adjust_display_pll_v3()
2168 ADJUST_DISPLAY_PLL_OUTPUT_PARAMETERS_V3 sOutput; member