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Searched refs:ring (Results 1 – 25 of 456) sorted by relevance

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/netbsd-src/usr.bin/telnet/
H A Dring.c101 ring_init(Ring *ring, unsigned char *buffer, int count) in ring_init() argument
103 memset(ring, 0, sizeof *ring); in ring_init()
105 ring->size = count; in ring_init()
107 ring->supply = ring->consume = ring->bottom = buffer; in ring_init()
109 ring->top = ring->bottom+ring->size; in ring_init()
112 ring->clearto = 0; in ring_init()
125 ring_mark(Ring *ring) in ring_mark() argument
127 ring->mark = ring_decrement(ring, ring->supply, 1); in ring_mark()
135 ring_at_mark(Ring *ring) in ring_at_mark() argument
137 if (ring->mark == ring->consume) { in ring_at_mark()
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/netbsd-src/sys/external/bsd/drm2/dist/drm/amd/amdgpu/
H A Damdgpu_ring.c59 struct amdgpu_ring *ring);
60 static void amdgpu_debugfs_ring_fini(struct amdgpu_ring *ring);
72 int amdgpu_ring_alloc(struct amdgpu_ring *ring, unsigned ndw) in amdgpu_ring_alloc() argument
76 ndw = (ndw + ring->funcs->align_mask) & ~ring->funcs->align_mask; in amdgpu_ring_alloc()
81 if (WARN_ON_ONCE(ndw > ring->max_dw)) in amdgpu_ring_alloc()
84 ring->count_dw = ndw; in amdgpu_ring_alloc()
85 ring->wptr_old = ring->wptr; in amdgpu_ring_alloc()
87 if (ring->funcs->begin_use) in amdgpu_ring_alloc()
88 ring->funcs->begin_use(ring); in amdgpu_ring_alloc()
100 void amdgpu_ring_insert_nop(struct amdgpu_ring *ring, uint32_t count) in amdgpu_ring_insert_nop() argument
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H A Damdgpu_jpeg_v1_0.c41 static void jpeg_v1_0_decode_ring_patch_wreg(struct amdgpu_ring *ring, uint32_t *ptr, uint32_t reg_… in jpeg_v1_0_decode_ring_patch_wreg() argument
43 struct amdgpu_device *adev = ring->adev; in jpeg_v1_0_decode_ring_patch_wreg()
44 …ring->ring[(*ptr)++] = PACKETJ(SOC15_REG_OFFSET(JPEG, 0, mmUVD_JRBC_EXTERNAL_REG_BASE), 0, 0, PACK… in jpeg_v1_0_decode_ring_patch_wreg()
47 ring->ring[(*ptr)++] = 0; in jpeg_v1_0_decode_ring_patch_wreg()
48 ring->ring[(*ptr)++] = PACKETJ((reg_offset >> 2), 0, 0, PACKETJ_TYPE0); in jpeg_v1_0_decode_ring_patch_wreg()
50 ring->ring[(*ptr)++] = reg_offset; in jpeg_v1_0_decode_ring_patch_wreg()
51 ring->ring[(*ptr)++] = PACKETJ(0, 0, 0, PACKETJ_TYPE0); in jpeg_v1_0_decode_ring_patch_wreg()
53 ring->ring[(*ptr)++] = val; in jpeg_v1_0_decode_ring_patch_wreg()
56 static void jpeg_v1_0_decode_ring_set_patch_ring(struct amdgpu_ring *ring, uint32_t ptr) in jpeg_v1_0_decode_ring_set_patch_ring() argument
58 struct amdgpu_device *adev = ring->adev; in jpeg_v1_0_decode_ring_set_patch_ring()
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H A Damdgpu_fence.c64 struct amdgpu_ring *ring; member
106 static void amdgpu_fence_write(struct amdgpu_ring *ring, u32 seq) in amdgpu_fence_write() argument
108 struct amdgpu_fence_driver *drv = &ring->fence_drv; in amdgpu_fence_write()
122 static u32 amdgpu_fence_read(struct amdgpu_ring *ring) in amdgpu_fence_read() argument
124 struct amdgpu_fence_driver *drv = &ring->fence_drv; in amdgpu_fence_read()
144 int amdgpu_fence_emit(struct amdgpu_ring *ring, struct dma_fence **f, in amdgpu_fence_emit() argument
147 struct amdgpu_device *adev = ring->adev; in amdgpu_fence_emit()
157 seq = ++ring->fence_drv.sync_seq; in amdgpu_fence_emit()
158 fence->ring = ring; in amdgpu_fence_emit()
160 &ring->fence_drv.lock, in amdgpu_fence_emit()
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H A Damdgpu_jpeg_v2_0.c93 struct amdgpu_ring *ring; in jpeg_v2_0_sw_init() local
110 ring = &adev->jpeg.inst->ring_dec; in jpeg_v2_0_sw_init()
111 ring->use_doorbell = true; in jpeg_v2_0_sw_init()
112 ring->doorbell_index = (adev->doorbell_index.vcn.vcn_ring0_1 << 1) + 1; in jpeg_v2_0_sw_init()
113 snprintf(ring->name, sizeof(ring->name), "jpeg_dec"); in jpeg_v2_0_sw_init()
114 r = amdgpu_ring_init(adev, ring, 512, &adev->jpeg.inst->irq, 0); in jpeg_v2_0_sw_init()
154 struct amdgpu_ring *ring = &adev->jpeg.inst->ring_dec; in jpeg_v2_0_hw_init() local
157 adev->nbio.funcs->vcn_doorbell_range(adev, ring->use_doorbell, in jpeg_v2_0_hw_init()
160 r = amdgpu_ring_test_helper(ring); in jpeg_v2_0_hw_init()
177 struct amdgpu_ring *ring = &adev->jpeg.inst->ring_dec; in jpeg_v2_0_hw_fini() local
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H A Damdgpu_ring.h92 void amdgpu_fence_driver_force_completion(struct amdgpu_ring *ring);
94 int amdgpu_fence_driver_init_ring(struct amdgpu_ring *ring,
96 int amdgpu_fence_driver_start_ring(struct amdgpu_ring *ring,
101 int amdgpu_fence_emit(struct amdgpu_ring *ring, struct dma_fence **fence,
103 int amdgpu_fence_emit_polling(struct amdgpu_ring *ring, uint32_t *s);
104 bool amdgpu_fence_process(struct amdgpu_ring *ring);
105 int amdgpu_fence_wait_empty(struct amdgpu_ring *ring);
106 signed long amdgpu_fence_wait_polling(struct amdgpu_ring *ring,
109 unsigned amdgpu_fence_count_emitted(struct amdgpu_ring *ring);
126 u64 (*get_rptr)(struct amdgpu_ring *ring);
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H A Damdgpu_uvd_v7_0.c78 static uint64_t uvd_v7_0_ring_get_rptr(struct amdgpu_ring *ring) in uvd_v7_0_ring_get_rptr() argument
80 struct amdgpu_device *adev = ring->adev; in uvd_v7_0_ring_get_rptr()
82 return RREG32_SOC15(UVD, ring->me, mmUVD_RBC_RB_RPTR); in uvd_v7_0_ring_get_rptr()
92 static uint64_t uvd_v7_0_enc_ring_get_rptr(struct amdgpu_ring *ring) in uvd_v7_0_enc_ring_get_rptr() argument
94 struct amdgpu_device *adev = ring->adev; in uvd_v7_0_enc_ring_get_rptr()
96 if (ring == &adev->uvd.inst[ring->me].ring_enc[0]) in uvd_v7_0_enc_ring_get_rptr()
97 return RREG32_SOC15(UVD, ring->me, mmUVD_RB_RPTR); in uvd_v7_0_enc_ring_get_rptr()
99 return RREG32_SOC15(UVD, ring->me, mmUVD_RB_RPTR2); in uvd_v7_0_enc_ring_get_rptr()
109 static uint64_t uvd_v7_0_ring_get_wptr(struct amdgpu_ring *ring) in uvd_v7_0_ring_get_wptr() argument
111 struct amdgpu_device *adev = ring->adev; in uvd_v7_0_ring_get_wptr()
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H A Damdgpu_ib.c127 int amdgpu_ib_schedule(struct amdgpu_ring *ring, unsigned num_ibs, in amdgpu_ib_schedule() argument
131 struct amdgpu_device *adev = ring->adev; in amdgpu_ib_schedule()
158 if (!ring->sched.ready) { in amdgpu_ib_schedule()
159 dev_err(adev->dev, "couldn't schedule ib on ring <%s>\n", ring->name); in amdgpu_ib_schedule()
168 alloc_size = ring->funcs->emit_frame_size + num_ibs * in amdgpu_ib_schedule()
169 ring->funcs->emit_ib_size; in amdgpu_ib_schedule()
171 r = amdgpu_ring_alloc(ring, alloc_size); in amdgpu_ib_schedule()
177 need_ctx_switch = ring->current_ctx != fence_ctx; in amdgpu_ib_schedule()
178 if (ring->funcs->emit_pipeline_sync && job && in amdgpu_ib_schedule()
181 amdgpu_vm_need_pipeline_sync(ring, job))) { in amdgpu_ib_schedule()
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H A Damdgpu_uvd_v6_0.c82 static uint64_t uvd_v6_0_ring_get_rptr(struct amdgpu_ring *ring) in uvd_v6_0_ring_get_rptr() argument
84 struct amdgpu_device *adev = ring->adev; in uvd_v6_0_ring_get_rptr()
96 static uint64_t uvd_v6_0_enc_ring_get_rptr(struct amdgpu_ring *ring) in uvd_v6_0_enc_ring_get_rptr() argument
98 struct amdgpu_device *adev = ring->adev; in uvd_v6_0_enc_ring_get_rptr()
100 if (ring == &adev->uvd.inst->ring_enc[0]) in uvd_v6_0_enc_ring_get_rptr()
112 static uint64_t uvd_v6_0_ring_get_wptr(struct amdgpu_ring *ring) in uvd_v6_0_ring_get_wptr() argument
114 struct amdgpu_device *adev = ring->adev; in uvd_v6_0_ring_get_wptr()
126 static uint64_t uvd_v6_0_enc_ring_get_wptr(struct amdgpu_ring *ring) in uvd_v6_0_enc_ring_get_wptr() argument
128 struct amdgpu_device *adev = ring->adev; in uvd_v6_0_enc_ring_get_wptr()
130 if (ring == &adev->uvd.inst->ring_enc[0]) in uvd_v6_0_enc_ring_get_wptr()
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H A Damdgpu_vcn_v2_0.c95 struct amdgpu_ring *ring; in vcn_v2_0_sw_init() local
133 ring = &adev->vcn.inst->ring_dec; in vcn_v2_0_sw_init()
135 ring->use_doorbell = true; in vcn_v2_0_sw_init()
136 ring->doorbell_index = adev->doorbell_index.vcn.vcn_ring0_1 << 1; in vcn_v2_0_sw_init()
138 snprintf(ring->name, sizeof(ring->name), "vcn_dec"); in vcn_v2_0_sw_init()
139 r = amdgpu_ring_init(adev, ring, 512, &adev->vcn.inst->irq, 0); in vcn_v2_0_sw_init()
162 ring = &adev->vcn.inst->ring_enc[i]; in vcn_v2_0_sw_init()
163 ring->use_doorbell = true; in vcn_v2_0_sw_init()
164 ring->doorbell_index = (adev->doorbell_index.vcn.vcn_ring0_1 << 1) + 2 + i; in vcn_v2_0_sw_init()
165 snprintf(ring->name, sizeof(ring->name), "vcn_enc%d", i); in vcn_v2_0_sw_init()
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H A Damdgpu_sdma_v5_0.c239 static unsigned sdma_v5_0_ring_init_cond_exec(struct amdgpu_ring *ring) in sdma_v5_0_ring_init_cond_exec() argument
243 amdgpu_ring_write(ring, SDMA_PKT_HEADER_OP(SDMA_OP_COND_EXE)); in sdma_v5_0_ring_init_cond_exec()
244 amdgpu_ring_write(ring, lower_32_bits(ring->cond_exe_gpu_addr)); in sdma_v5_0_ring_init_cond_exec()
245 amdgpu_ring_write(ring, upper_32_bits(ring->cond_exe_gpu_addr)); in sdma_v5_0_ring_init_cond_exec()
246 amdgpu_ring_write(ring, 1); in sdma_v5_0_ring_init_cond_exec()
247 ret = ring->wptr & ring->buf_mask;/* this is the offset we need patch later */ in sdma_v5_0_ring_init_cond_exec()
248 amdgpu_ring_write(ring, 0x55aa55aa);/* insert dummy here and patch it later */ in sdma_v5_0_ring_init_cond_exec()
253 static void sdma_v5_0_ring_patch_cond_exec(struct amdgpu_ring *ring, in sdma_v5_0_ring_patch_cond_exec() argument
258 BUG_ON(offset > ring->buf_mask); in sdma_v5_0_ring_patch_cond_exec()
259 BUG_ON(ring->ring[offset] != 0x55aa55aa); in sdma_v5_0_ring_patch_cond_exec()
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H A Damdgpu_si_dma.c46 static uint64_t si_dma_ring_get_rptr(struct amdgpu_ring *ring) in si_dma_ring_get_rptr() argument
48 return ring->adev->wb.wb[ring->rptr_offs>>2]; in si_dma_ring_get_rptr()
51 static uint64_t si_dma_ring_get_wptr(struct amdgpu_ring *ring) in si_dma_ring_get_wptr() argument
53 struct amdgpu_device *adev = ring->adev; in si_dma_ring_get_wptr()
54 u32 me = (ring == &adev->sdma.instance[0].ring) ? 0 : 1; in si_dma_ring_get_wptr()
59 static void si_dma_ring_set_wptr(struct amdgpu_ring *ring) in si_dma_ring_set_wptr() argument
61 struct amdgpu_device *adev = ring->adev; in si_dma_ring_set_wptr()
62 u32 me = (ring == &adev->sdma.instance[0].ring) ? 0 : 1; in si_dma_ring_set_wptr()
65 (lower_32_bits(ring->wptr) << 2) & 0x3fffc); in si_dma_ring_set_wptr()
68 static void si_dma_ring_emit_ib(struct amdgpu_ring *ring, in si_dma_ring_emit_ib() argument
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H A Damdgpu_uvd_v4_2.c63 static uint64_t uvd_v4_2_ring_get_rptr(struct amdgpu_ring *ring) in uvd_v4_2_ring_get_rptr() argument
65 struct amdgpu_device *adev = ring->adev; in uvd_v4_2_ring_get_rptr()
77 static uint64_t uvd_v4_2_ring_get_wptr(struct amdgpu_ring *ring) in uvd_v4_2_ring_get_wptr() argument
79 struct amdgpu_device *adev = ring->adev; in uvd_v4_2_ring_get_wptr()
91 static void uvd_v4_2_ring_set_wptr(struct amdgpu_ring *ring) in uvd_v4_2_ring_set_wptr() argument
93 struct amdgpu_device *adev = ring->adev; in uvd_v4_2_ring_set_wptr()
95 WREG32(mmUVD_RBC_RB_WPTR, lower_32_bits(ring->wptr)); in uvd_v4_2_ring_set_wptr()
111 struct amdgpu_ring *ring; in uvd_v4_2_sw_init() local
124 ring = &adev->uvd.inst->ring; in uvd_v4_2_sw_init()
125 snprintf(ring->name, sizeof ring->name, "uvd"); in uvd_v4_2_sw_init()
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/netbsd-src/sys/external/bsd/drm2/dist/drm/radeon/
H A Dradeon_ring.c54 static int radeon_debugfs_ring_init(struct radeon_device *rdev, struct radeon_ring *ring);
67 struct radeon_ring *ring) in radeon_ring_supports_scratch_reg() argument
69 switch (ring->idx) { in radeon_ring_supports_scratch_reg()
87 void radeon_ring_free_size(struct radeon_device *rdev, struct radeon_ring *ring) in radeon_ring_free_size() argument
89 uint32_t rptr = radeon_ring_get_rptr(rdev, ring); in radeon_ring_free_size()
92 ring->ring_free_dw = rptr + (ring->ring_size / 4); in radeon_ring_free_size()
93 ring->ring_free_dw -= ring->wptr; in radeon_ring_free_size()
94 ring->ring_free_dw &= ring->ptr_mask; in radeon_ring_free_size()
95 if (!ring->ring_free_dw) { in radeon_ring_free_size()
97 ring->ring_free_dw = ring->ring_size / 4; in radeon_ring_free_size()
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H A Dradeon_cik_sdma.c69 struct radeon_ring *ring) in cik_sdma_get_rptr() argument
74 rptr = rdev->wb.wb[ring->rptr_offs/4]; in cik_sdma_get_rptr()
76 if (ring->idx == R600_RING_TYPE_DMA_INDEX) in cik_sdma_get_rptr()
96 struct radeon_ring *ring) in cik_sdma_get_wptr() argument
100 if (ring->idx == R600_RING_TYPE_DMA_INDEX) in cik_sdma_get_wptr()
117 struct radeon_ring *ring) in cik_sdma_set_wptr() argument
121 if (ring->idx == R600_RING_TYPE_DMA_INDEX) in cik_sdma_set_wptr()
126 WREG32(reg, (ring->wptr << 2) & 0x3fffc); in cik_sdma_set_wptr()
141 struct radeon_ring *ring = &rdev->ring[ib->ring]; in cik_sdma_ring_ib_execute() local
142 u32 extra_bits = (ib->vm ? ib->vm->ids[ib->ring].id : 0) & 0xf; in cik_sdma_ring_ib_execute()
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H A Dradeon_fence.c75 static void radeon_fence_write(struct radeon_device *rdev, u32 seq, int ring) in radeon_fence_write() argument
77 struct radeon_fence_driver *drv = &rdev->fence_drv[ring]; in radeon_fence_write()
96 static u32 radeon_fence_read(struct radeon_device *rdev, int ring) in radeon_fence_read() argument
98 struct radeon_fence_driver *drv = &rdev->fence_drv[ring]; in radeon_fence_read()
121 static void radeon_fence_schedule_check(struct radeon_device *rdev, int ring) in radeon_fence_schedule_check() argument
128 &rdev->fence_drv[ring].lockup_work, in radeon_fence_schedule_check()
144 int ring) in radeon_fence_emit() argument
154 (*fence)->seq = seq = ++rdev->fence_drv[ring].sync_seq[ring]; in radeon_fence_emit()
155 (*fence)->ring = ring; in radeon_fence_emit()
159 rdev->fence_context + ring, in radeon_fence_emit()
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H A Dradeon_r600_dma.c57 struct radeon_ring *ring) in r600_dma_get_rptr() argument
62 rptr = rdev->wb.wb[ring->rptr_offs/4]; in r600_dma_get_rptr()
78 struct radeon_ring *ring) in r600_dma_get_wptr() argument
92 struct radeon_ring *ring) in r600_dma_set_wptr() argument
94 WREG32(DMA_RB_WPTR, (ring->wptr << 2) & 0x3fffc); in r600_dma_set_wptr()
114 rdev->ring[R600_RING_TYPE_DMA_INDEX].ready = false; in r600_dma_stop()
127 struct radeon_ring *ring = &rdev->ring[R600_RING_TYPE_DMA_INDEX]; in r600_dma_resume() local
136 rb_bufsz = order_base_2(ring->ring_size / 4); in r600_dma_resume()
156 WREG32(DMA_RB_BASE, ring->gpu_addr >> 8); in r600_dma_resume()
172 ring->wptr = 0; in r600_dma_resume()
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H A Dradeon_uvd_v1_0.c45 struct radeon_ring *ring) in uvd_v1_0_get_rptr() argument
59 struct radeon_ring *ring) in uvd_v1_0_get_wptr() argument
73 struct radeon_ring *ring) in uvd_v1_0_set_wptr() argument
75 WREG32(UVD_RBC_RB_WPTR, ring->wptr); in uvd_v1_0_set_wptr()
89 struct radeon_ring *ring = &rdev->ring[fence->ring]; in uvd_v1_0_fence_emit() local
90 uint64_t addr = rdev->fence_drv[fence->ring].gpu_addr; in uvd_v1_0_fence_emit()
92 radeon_ring_write(ring, PACKET0(UVD_GPCOM_VCPU_DATA0, 0)); in uvd_v1_0_fence_emit()
93 radeon_ring_write(ring, addr & 0xffffffff); in uvd_v1_0_fence_emit()
94 radeon_ring_write(ring, PACKET0(UVD_GPCOM_VCPU_DATA1, 0)); in uvd_v1_0_fence_emit()
95 radeon_ring_write(ring, fence->seq); in uvd_v1_0_fence_emit()
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H A Dradeon_evergreen_dma.c49 struct radeon_ring *ring = &rdev->ring[fence->ring]; in evergreen_dma_fence_ring_emit() local
50 u64 addr = rdev->fence_drv[fence->ring].gpu_addr; in evergreen_dma_fence_ring_emit()
52 radeon_ring_write(ring, DMA_PACKET(DMA_PACKET_FENCE, 0, 0)); in evergreen_dma_fence_ring_emit()
53 radeon_ring_write(ring, addr & 0xfffffffc); in evergreen_dma_fence_ring_emit()
54 radeon_ring_write(ring, (upper_32_bits(addr) & 0xff)); in evergreen_dma_fence_ring_emit()
55 radeon_ring_write(ring, fence->seq); in evergreen_dma_fence_ring_emit()
57 radeon_ring_write(ring, DMA_PACKET(DMA_PACKET_TRAP, 0, 0)); in evergreen_dma_fence_ring_emit()
59 radeon_ring_write(ring, DMA_PACKET(DMA_PACKET_SRBM_WRITE, 0, 0)); in evergreen_dma_fence_ring_emit()
60 radeon_ring_write(ring, (0xf << 16) | (HDP_MEM_COHERENCY_FLUSH_CNTL >> 2)); in evergreen_dma_fence_ring_emit()
61 radeon_ring_write(ring, 1); in evergreen_dma_fence_ring_emit()
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H A Dradeon_ni_dma.c59 struct radeon_ring *ring) in cayman_dma_get_rptr() argument
64 rptr = rdev->wb.wb[ring->rptr_offs/4]; in cayman_dma_get_rptr()
66 if (ring->idx == R600_RING_TYPE_DMA_INDEX) in cayman_dma_get_rptr()
86 struct radeon_ring *ring) in cayman_dma_get_wptr() argument
90 if (ring->idx == R600_RING_TYPE_DMA_INDEX) in cayman_dma_get_wptr()
107 struct radeon_ring *ring) in cayman_dma_set_wptr() argument
111 if (ring->idx == R600_RING_TYPE_DMA_INDEX) in cayman_dma_set_wptr()
116 WREG32(reg, (ring->wptr << 2) & 0x3fffc); in cayman_dma_set_wptr()
130 struct radeon_ring *ring = &rdev->ring[ib->ring]; in cayman_dma_ring_ib_execute() local
131 unsigned vm_id = ib->vm ? ib->vm->ids[ib->ring].id : 0; in cayman_dma_ring_ib_execute()
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H A Dradeon_trace.h36 __field(u32, ring)
42 __entry->ring = p->ring;
45 p->rdev, p->ring);
48 __entry->ring, __entry->dw,
53 TP_PROTO(unsigned vmid, int ring),
54 TP_ARGS(vmid, ring),
57 __field(u32, ring)
62 __entry->ring = ring;
64 TP_printk("vmid=%u, ring=%u", __entry->vmid, __entry->ring)
110 TP_PROTO(uint64_t pd_addr, unsigned ring, unsigned id),
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/netbsd-src/sys/dev/audio/
H A Daudiodef.h282 #define DIAGNOSTIC_ring(ring) audio_diagnostic_ring(__func__, (ring)) argument
285 #define DIAGNOSTIC_ring(ring) argument
311 auring_round(const audio_ring_t *ring, int idx) in auring_round() argument
313 DIAGNOSTIC_ring(ring); in auring_round()
315 KASSERTMSG(idx < ring->capacity * 2, in auring_round()
316 "idx=%d ring->capacity=%d", idx, ring->capacity); in auring_round()
318 if (idx < ring->capacity) { in auring_round()
321 return idx - ring->capacity; in auring_round()
330 auring_tail(const audio_ring_t *ring) in auring_tail() argument
332 return auring_round(ring, ring->head + ring->used); in auring_tail()
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/netbsd-src/sys/external/bsd/drm2/dist/drm/i915/gt/
H A Dintel_ring.c19 unsigned int intel_ring_update_space(struct intel_ring *ring) in intel_ring_update_space() argument
23 space = __intel_ring_space(ring->head, ring->emit, ring->size); in intel_ring_update_space()
25 ring->space = space; in intel_ring_update_space()
29 int intel_ring_pin(struct intel_ring *ring) in intel_ring_pin() argument
31 struct i915_vma *vma = ring->vma; in intel_ring_pin()
36 if (atomic_fetch_inc(&ring->pin_count)) in intel_ring_pin()
66 intel_ring_reset(ring, ring->emit); in intel_ring_pin()
68 ring->vaddr = addr; in intel_ring_pin()
74 atomic_dec(&ring->pin_count); in intel_ring_pin()
78 void intel_ring_reset(struct intel_ring *ring, u32 tail) in intel_ring_reset() argument
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H A Dintel_ring.h24 unsigned int intel_ring_update_space(struct intel_ring *ring);
26 int intel_ring_pin(struct intel_ring *ring);
27 void intel_ring_unpin(struct intel_ring *ring);
28 void intel_ring_reset(struct intel_ring *ring, u32 tail);
32 static inline struct intel_ring *intel_ring_get(struct intel_ring *ring) in intel_ring_get() argument
34 kref_get(&ring->ref); in intel_ring_get()
35 return ring; in intel_ring_get()
38 static inline void intel_ring_put(struct intel_ring *ring) in intel_ring_put() argument
40 kref_put(&ring->ref, intel_ring_free); in intel_ring_put()
53 GEM_BUG_ON((rq->ring->vaddr + rq->ring->emit) != cs); in intel_ring_advance()
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/netbsd-src/games/rogue/
H A Dring.c78 object *ring; in put_on_ring() local
87 if (!(ring = get_letter_object(ch))) { in put_on_ring()
91 if (!(ring->what_is & RING)) { in put_on_ring()
95 if (ring->in_use_flags & (ON_LEFT_HAND | ON_RIGHT_HAND)) { in put_on_ring()
118 do_put_on(ring, 1); in put_on_ring()
120 do_put_on(ring, 0); in put_on_ring()
124 get_desc(ring, desc, sizeof(desc)); in put_on_ring()
135 do_put_on(object *ring, boolean on_left) in do_put_on() argument
138 ring->in_use_flags |= ON_LEFT_HAND; in do_put_on()
139 rogue.left_ring = ring; in do_put_on()
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