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Searched refs:reg_value (Results 1 – 22 of 22) sorted by relevance

/netbsd-src/sys/external/bsd/drm2/dist/drm/amd/display/dc/
H A Ddm_services.h109 uint32_t reg_value, in get_reg_field_value_ex() argument
113 return (mask & reg_value) >> shift; in get_reg_field_value_ex()
116 #define get_reg_field_value(reg_value, reg_name, reg_field)\ argument
118 (reg_value),\
123 uint32_t reg_value, in set_reg_field_value_ex() argument
129 return (reg_value & ~mask) | (mask & (value << shift)); in set_reg_field_value_ex()
132 #define set_reg_field_value(reg_value, value, reg_name, reg_field)\ argument
133 (reg_value) = set_reg_field_value_ex(\
134 (reg_value),\
185 #define get_reg_field_value_soc15(reg_value, block, reg_num, reg_name, reg_field)\ argument
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/netbsd-src/external/gpl3/binutils.old/dist/opcodes/
H A Daarch64-opc.c5247 aarch64_insn reg_value, in aarch64_sys_ins_reg_supported_p() argument
5267 if ((reg_value == CPENS (0, C8, C1, 0) in aarch64_sys_ins_reg_supported_p()
5268 || reg_value == CPENS (0, C8, C1, 1) in aarch64_sys_ins_reg_supported_p()
5269 || reg_value == CPENS (0, C8, C1, 2) in aarch64_sys_ins_reg_supported_p()
5270 || reg_value == CPENS (0, C8, C1, 3) in aarch64_sys_ins_reg_supported_p()
5271 || reg_value == CPENS (0, C8, C1, 5) in aarch64_sys_ins_reg_supported_p()
5272 || reg_value == CPENS (0, C8, C1, 7) in aarch64_sys_ins_reg_supported_p()
5273 || reg_value == CPENS (4, C8, C4, 0) in aarch64_sys_ins_reg_supported_p()
5274 || reg_value == CPENS (4, C8, C4, 4) in aarch64_sys_ins_reg_supported_p()
5275 || reg_value == CPENS (4, C8, C1, 1) in aarch64_sys_ins_reg_supported_p()
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H A Dns32k-dis.c247 list_search (int reg_value, const struct ns32k_option *optionP, char *result) in list_search() argument
251 if ((reg_value & optionP->match) == optionP->value) in list_search()
/netbsd-src/sys/external/bsd/drm2/dist/drm/amd/amdgpu/
H A Dmmsch_v1_0.h77 uint32_t reg_value; member
98 uint32_t reg_value; member
107 direct_wt->reg_value = value; in mmsch_v1_0_insert_direct_wt()
H A Dpsp_gfx_if.h94 uint32_t reg_value; /* Value to be set to the IH_RB_CNTL... register*/ member
273 uint32_t reg_value; member
H A Damdgpu_mmhub_v1_0.c738 uint32_t reg_value; in mmhub_v1_0_query_ras_error_count() local
744 reg_value = in mmhub_v1_0_query_ras_error_count()
746 if (reg_value) in mmhub_v1_0_query_ras_error_count()
748 reg_value, &sec_count, &ded_count); in mmhub_v1_0_query_ras_error_count()
H A Dsoc15.h52 uint32_t reg_value; member
H A Damdgpu_gfx_v9_4.c864 uint32_t reg_value; in gfx_v9_4_query_ras_error_count() local
879 reg_value = RREG32(SOC15_REG_ENTRY_OFFSET( in gfx_v9_4_query_ras_error_count()
881 if (reg_value) in gfx_v9_4_query_ras_error_count()
884 j, k, reg_value, &sec_count, in gfx_v9_4_query_ras_error_count()
H A Damdgpu_mmhub_v9_4.c1587 uint32_t reg_value; in mmhub_v9_4_query_ras_error_count() local
1593 reg_value = in mmhub_v9_4_query_ras_error_count()
1595 if (reg_value) in mmhub_v9_4_query_ras_error_count()
1597 reg_value, &sec_count, &ded_count); in mmhub_v9_4_query_ras_error_count()
H A Damdgpu_sdma_v4_0.c2565 uint32_t reg_value = 0; in sdma_v4_0_query_ras_error_count() local
2567 reg_value = RREG32_SDMA(instance, mmSDMA0_EDC_COUNTER); in sdma_v4_0_query_ras_error_count()
2569 if (reg_value) in sdma_v4_0_query_ras_error_count()
2570 sdma_v4_0_get_ras_error_count(reg_value, in sdma_v4_0_query_ras_error_count()
H A Damdgpu_gfx_v9_0.c4259 ib.ptr[ib.length_dw++] = vgpr_init_regs[i].reg_value; in gfx_v9_0_do_edc_gpr_workarounds()
4287 ib.ptr[ib.length_dw++] = sgpr1_init_regs[i].reg_value; in gfx_v9_0_do_edc_gpr_workarounds()
4315 ib.ptr[ib.length_dw++] = sgpr2_init_regs[i].reg_value; in gfx_v9_0_do_edc_gpr_workarounds()
6389 uint32_t reg_value; in gfx_v9_0_query_ras_error_count() local
6403 reg_value = in gfx_v9_0_query_ras_error_count()
6405 if (reg_value) in gfx_v9_0_query_ras_error_count()
6407 j, k, reg_value, in gfx_v9_0_query_ras_error_count()
H A Damdgpu_psp.c411 cmd->cmd.cmd_setup_reg_prog.reg_value = value; in psp_prep_reg_prog_cmd_buf()
/netbsd-src/sys/external/bsd/drm2/dist/drm/amd/display/dc/basics/
H A Damdgpu_conversion.c100 uint32_t reg_value = in convert_float_matrix() local
109 matrix[i] = (uint16_t)reg_value; in convert_float_matrix()
/netbsd-src/usr.bin/scmdctl/
H A Dscmdctl.c163 int8_t reg_value; in main() local
302 reg_value = (int8_t)strtoi(argv[5], NULL, 0, -127, 127, &error); in main()
304 err(EXIT_FAILURE,"Bad conversion for set motor for reg_value: %s", argv[5]); in main()
310 error = common_set_motor(&func_block, fd, debug, (int)module, motor, reg_value); in main()
426 reg_value = (int8_t)strtoi(argv[4], NULL, 0, 0, 0xff, &error); in main()
428 err(EXIT_FAILURE,"Bad conversion for write register for reg_value: %s", argv[4]); in main()
430 error = uart_write_register(fd,debug,module,reg,reg_value); in main()
432 error = i2cspi_write_register(fd,debug,module,reg,reg_value); in main()
/netbsd-src/sys/external/bsd/drm2/dist/drm/amd/display/dmub/src/
H A Damdgpu_dmub_reg.c71 static inline uint32_t get_reg_field_value_ex(uint32_t reg_value, uint32_t mask, in get_reg_field_value_ex() argument
74 return (mask & reg_value) >> shift; in get_reg_field_value_ex()
/netbsd-src/sys/external/bsd/drm2/dist/drm/i915/
H A Dintel_uncore.c2032 u32 uninitialized_var(reg_value); in __intel_wait_for_register_fw()
2033 #define done (((reg_value = intel_uncore_read_fw(uncore, reg)) & mask) == value) in __intel_wait_for_register_fw()
2047 *out_value = reg_value; in __intel_wait_for_register_fw()
2082 u32 reg_value; in __intel_wait_for_register() local
2092 fast_timeout_us, 0, &reg_value); in __intel_wait_for_register()
2098 ret = __wait_for(reg_value = intel_uncore_read_notrace(uncore, in __intel_wait_for_register()
2100 (reg_value & mask) == value, in __intel_wait_for_register()
2104 trace_i915_reg_rw(false, reg, reg_value, sizeof(reg_value), true); in __intel_wait_for_register()
2107 *out_value = reg_value; in __intel_wait_for_register()
H A Di915_drv.c2417 u32 reg_value; in vlv_wait_for_pw_status() local
2427 ret = wait_for(((reg_value = in vlv_wait_for_pw_status()
2432 trace_i915_reg_rw(false, reg, reg_value, sizeof(reg_value), true); in vlv_wait_for_pw_status()
/netbsd-src/external/gpl3/binutils/dist/opcodes/
H A Dns32k-dis.c247 list_search (int reg_value, const struct ns32k_option *optionP, char *result) in list_search() argument
251 if ((reg_value & optionP->match) == optionP->value) in list_search()
/netbsd-src/sys/external/bsd/drm2/dist/drm/amd/powerplay/hwmgr/
H A Damdgpu_smu10_hwmgr.c1111 uint32_t reg_value = RREG32_SOC15(THM, 0, mmTHM_TCON_CUR_TMP); in smu10_thermal_get_temperature() local
1113 (reg_value & THM_TCON_CUR_TMP__CUR_TEMP_MASK) >> THM_TCON_CUR_TMP__CUR_TEMP__SHIFT; in smu10_thermal_get_temperature()
/netbsd-src/external/gpl3/gdb/dist/gdb/
H A DChangeLog-20195539 * nios2-tdep.c (struct reg_value): Improve comments. Make
/netbsd-src/external/gpl3/gdb.old/dist/gdb/
H A DChangeLog-20195539 * nios2-tdep.c (struct reg_value): Improve comments. Make
/netbsd-src/external/gpl3/binutils/dist/
H A DChangeLog.git16834 The erroneous omission of a "reg_value == " in the THE system register