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Searched refs:pipe_ctx (Results 1 – 25 of 48) sorted by relevance

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/netbsd-src/sys/external/bsd/drm2/dist/drm/amd/display/dc/dcn10/
H A Ddcn10_hw_sequencer.h38 int dcn10_get_vupdate_offset_from_vsync(struct pipe_ctx *pipe_ctx);
39 void dcn10_setup_vupdate_interrupt(struct dc *dc, struct pipe_ctx *pipe_ctx);
41 struct pipe_ctx *pipe_ctx,
52 struct pipe_ctx *pipe,
56 struct pipe_ctx *pipe_ctx,
58 void dcn10_unblank_stream(struct pipe_ctx *pipe_ctx,
61 struct pipe_ctx *pipe_ctx,
65 bool dcn10_set_output_transfer_func(struct dc *dc, struct pipe_ctx *pipe_ctx,
67 bool dcn10_set_input_transfer_func(struct dc *dc, struct pipe_ctx *pipe_ctx,
69 void dcn10_update_plane_addr(const struct dc *dc, struct pipe_ctx *pipe_ctx);
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H A Damdgpu_dcn10_hw_sequencer.c94 struct pipe_ctx *pipe_ctx; in dcn10_lock_all_pipes() local
99 pipe_ctx = &context->res_ctx.pipe_ctx[i]; in dcn10_lock_all_pipes()
100 tg = pipe_ctx->stream_res.tg; in dcn10_lock_all_pipes()
105 if (pipe_ctx->top_pipe || in dcn10_lock_all_pipes()
106 !pipe_ctx->stream || !pipe_ctx->plane_state || in dcn10_lock_all_pipes()
466 bool dcn10_did_underflow_occur(struct dc *dc, struct pipe_ctx *pipe_ctx) in dcn10_did_underflow_occur() argument
468 struct hubp *hubp = pipe_ctx->plane_res.hubp; in dcn10_did_underflow_occur()
469 struct timing_generator *tg = pipe_ctx->stream_res.tg; in dcn10_did_underflow_occur()
762 struct pipe_ctx *old_pipe_ctx = &dc->current_state->res_ctx.pipe_ctx[i]; in false_optc_underflow_wa()
778 struct pipe_ctx *pipe_ctx, in dcn10_enable_stream_timing() argument
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/netbsd-src/sys/external/bsd/drm2/dist/drm/amd/display/dc/inc/
H A Dhw_sequencer.h42 struct pipe_ctx;
65 void (*disable_plane)(struct dc *dc, struct pipe_ctx *pipe_ctx);
72 struct pipe_ctx *pipe_ctx);
77 struct pipe_ctx *pipe_ctx);
79 struct pipe_ctx *pipe_ctx, bool enableTripleBuffer);
80 void (*update_pending_status)(struct pipe_ctx *pipe_ctx);
84 struct pipe_ctx *pipe, bool lock);
86 struct pipe_ctx *pipe, bool lock);
87 void (*set_flip_control_gsl)(struct pipe_ctx *pipe_ctx,
91 void (*get_position)(struct pipe_ctx **pipe_ctx, int num_pipes,
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H A Dhw_sequencer_private.h51 struct pipe_ctx;
71 void (*disable_stream_gating)(struct dc *dc, struct pipe_ctx *pipe_ctx);
72 void (*enable_stream_gating)(struct dc *dc, struct pipe_ctx *pipe_ctx);
76 struct pipe_ctx *pipe_ctx);
78 struct pipe_ctx *pipe_ctx);
79 void (*update_mpcc)(struct dc *dc, struct pipe_ctx *pipe_ctx);
81 struct pipe_ctx *pipe_ctx,
84 struct pipe_ctx *pipe_ctx,
94 struct pipe_ctx *pipe_ctx,
97 struct pipe_ctx *pipe_ctx,
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H A Ddc_link_dp.h65 struct pipe_ctx *pipe_ctx,
85 bool dp_set_dsc_enable(struct pipe_ctx *pipe_ctx, bool enable);
86 bool dp_set_dsc_pps_sdp(struct pipe_ctx *pipe_ctx, bool enable);
87 void dp_set_dsc_on_stream(struct pipe_ctx *pipe_ctx, bool enable);
88 bool dp_update_dsc_config(struct pipe_ctx *pipe_ctx);
H A Dresource.h92 bool resource_build_scaling_params(struct pipe_ctx *pipe_ctx);
98 void resource_build_info_frame(struct pipe_ctx *pipe_ctx);
121 struct pipe_ctx *pipe_ctx);
127 struct pipe_ctx *resource_get_head_pipe_for_stream(
138 struct pipe_ctx *find_idle_secondary_pipe(
141 const struct pipe_ctx *primary_pipe);
168 struct pipe_ctx *pipe_ctx_old,
169 struct pipe_ctx *pipe_ctx);
H A Dcore_types.h80 struct pipe_ctx *pipe_ctx);
82 void core_link_disable_stream(struct pipe_ctx *pipe_ctx);
84 void core_link_set_avmute(struct pipe_ctx *pipe_ctx, bool enable);
113 struct pipe_ctx *(*acquire_idle_pipe_for_layer)(
278 struct pipe_ctx { struct
291 struct pipe_ctx *top_pipe; argument
292 struct pipe_ctx *bottom_pipe; argument
293 struct pipe_ctx *next_odm_pipe; argument
294 struct pipe_ctx *prev_odm_pipe; argument
308 struct pipe_ctx pipe_ctx[MAX_PIPES]; argument
/netbsd-src/sys/external/bsd/drm2/dist/drm/amd/display/dc/dce110/
H A Damdgpu_dce110_hw_sequencer.c278 dce110_set_input_transfer_func(struct dc *dc, struct pipe_ctx *pipe_ctx, in dce110_set_input_transfer_func() argument
281 struct input_pixel_processor *ipp = pipe_ctx->plane_res.ipp; in dce110_set_input_transfer_func()
606 dce110_set_output_transfer_func(struct dc *dc, struct pipe_ctx *pipe_ctx, in dce110_set_output_transfer_func() argument
609 struct transform *xfm = pipe_ctx->plane_res.xfm; in dce110_set_output_transfer_func()
631 void dce110_update_info_frame(struct pipe_ctx *pipe_ctx) in dce110_update_info_frame() argument
636 ASSERT(pipe_ctx->stream); in dce110_update_info_frame()
638 if (pipe_ctx->stream_res.stream_enc == NULL) in dce110_update_info_frame()
641 is_hdmi_tmds = dc_is_hdmi_tmds_signal(pipe_ctx->stream->signal); in dce110_update_info_frame()
642 is_dp = dc_is_dp_signal(pipe_ctx->stream->signal); in dce110_update_info_frame()
648 pipe_ctx->stream_res.stream_enc->funcs->update_hdmi_info_packets( in dce110_update_info_frame()
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H A Ddce110_hw_sequencer.h45 void dce110_enable_stream(struct pipe_ctx *pipe_ctx);
47 void dce110_disable_stream(struct pipe_ctx *pipe_ctx);
49 void dce110_unblank_stream(struct pipe_ctx *pipe_ctx,
52 void dce110_blank_stream(struct pipe_ctx *pipe_ctx);
54 void dce110_enable_audio_stream(struct pipe_ctx *pipe_ctx);
55 void dce110_disable_audio_stream(struct pipe_ctx *pipe_ctx);
57 void dce110_update_info_frame(struct pipe_ctx *pipe_ctx);
59 void dce110_set_avmute(struct pipe_ctx *pipe_ctx, bool enable);
H A Damdgpu_dce110_resource.c861 const struct pipe_ctx *pipe_ctx, in get_pixel_clock_parameters() argument
864 const struct dc_stream_state *stream = pipe_ctx->stream; in get_pixel_clock_parameters()
872 pixel_clk_params->signal_type = pipe_ctx->stream->signal; in get_pixel_clock_parameters()
873 pixel_clk_params->controller_id = pipe_ctx->stream_res.tg->inst + 1; in get_pixel_clock_parameters()
895 void dce110_resource_build_pipe_hw_param(struct pipe_ctx *pipe_ctx) in dce110_resource_build_pipe_hw_param() argument
897 get_pixel_clock_parameters(pipe_ctx, &pipe_ctx->stream_res.pix_clk_params); in dce110_resource_build_pipe_hw_param()
898 pipe_ctx->clock_source->funcs->get_pix_clk_dividers( in dce110_resource_build_pipe_hw_param()
899 pipe_ctx->clock_source, in dce110_resource_build_pipe_hw_param()
900 &pipe_ctx->stream_res.pix_clk_params, in dce110_resource_build_pipe_hw_param()
901 &pipe_ctx->pll_settings); in dce110_resource_build_pipe_hw_param()
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/netbsd-src/sys/external/bsd/drm2/dist/drm/amd/display/dc/dcn20/
H A Damdgpu_dcn20_hwseq.c98 struct pipe_ctx *pipe_ctx, in dcn20_setup_gsl_group_as_lock() argument
110 if (pipe_ctx->stream_res.gsl_group > 0) in dcn20_setup_gsl_group_as_lock()
115 pipe_ctx->stream_res.gsl_group = group_idx; in dcn20_setup_gsl_group_as_lock()
137 group_idx = pipe_ctx->stream_res.gsl_group; in dcn20_setup_gsl_group_as_lock()
141 pipe_ctx->stream_res.gsl_group = 0; in dcn20_setup_gsl_group_as_lock()
165 if (pipe_ctx->stream_res.tg->funcs->set_gsl != NULL && in dcn20_setup_gsl_group_as_lock()
166 pipe_ctx->stream_res.tg->funcs->set_gsl_source_select != NULL) { in dcn20_setup_gsl_group_as_lock()
167 pipe_ctx->stream_res.tg->funcs->set_gsl( in dcn20_setup_gsl_group_as_lock()
168 pipe_ctx->stream_res.tg, in dcn20_setup_gsl_group_as_lock()
171 pipe_ctx->stream_res.tg->funcs->set_gsl_source_select( in dcn20_setup_gsl_group_as_lock()
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H A Ddcn20_hwseq.h34 struct pipe_ctx *pipe_ctx, const struct dc_plane_state *plane_state);
36 struct pipe_ctx *pipe_ctx, const struct dc_plane_state *plane_state);
40 void dcn20_update_plane_addr(const struct dc *dc, struct pipe_ctx *pipe_ctx);
41 void dcn20_update_mpcc(struct dc *dc, struct pipe_ctx *pipe_ctx);
42 bool dcn20_set_input_transfer_func(struct dc *dc, struct pipe_ctx *pipe_ctx,
44 bool dcn20_set_output_transfer_func(struct dc *dc, struct pipe_ctx *pipe_ctx,
47 struct pipe_ctx *pipe_ctx,
51 void dcn20_enable_stream(struct pipe_ctx *pipe_ctx);
52 void dcn20_unblank_stream(struct pipe_ctx *pipe_ctx,
54 void dcn20_disable_plane(struct dc *dc, struct pipe_ctx *pipe_ctx);
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H A Damdgpu_dcn20_resource.c1445 struct pipe_ctx *pipe_ctx, in get_pixel_clock_parameters() argument
1448 const struct dc_stream_state *stream = pipe_ctx->stream; in get_pixel_clock_parameters()
1449 struct pipe_ctx *odm_pipe; in get_pixel_clock_parameters()
1452 for (odm_pipe = pipe_ctx->next_odm_pipe; odm_pipe; odm_pipe = odm_pipe->next_odm_pipe) in get_pixel_clock_parameters()
1457 pixel_clk_params->signal_type = pipe_ctx->stream->signal; in get_pixel_clock_parameters()
1458 pixel_clk_params->controller_id = pipe_ctx->stream_res.tg->inst + 1; in get_pixel_clock_parameters()
1488 static enum dc_status build_pipe_hw_param(struct pipe_ctx *pipe_ctx) in build_pipe_hw_param() argument
1491 get_pixel_clock_parameters(pipe_ctx, &pipe_ctx->stream_res.pix_clk_params); in build_pipe_hw_param()
1493 pipe_ctx->clock_source->funcs->get_pix_clk_dividers( in build_pipe_hw_param()
1494 pipe_ctx->clock_source, in build_pipe_hw_param()
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/netbsd-src/sys/external/bsd/drm2/dist/drm/amd/display/dc/core/
H A Damdgpu_dc_resource.c421 const struct pipe_ctx *pipe_with_clk_src, in is_sharable_clk_src()
422 const struct pipe_ctx *pipe) in is_sharable_clk_src()
453 struct pipe_ctx *pipe_ctx) in resource_find_used_clk_src_for_sharing() argument
458 if (is_sharable_clk_src(&res_ctx->pipe_ctx[i], pipe_ctx)) in resource_find_used_clk_src_for_sharing()
459 return res_ctx->pipe_ctx[i].clock_source; in resource_find_used_clk_src_for_sharing()
540 static void calculate_viewport(struct pipe_ctx *pipe_ctx) in calculate_viewport() argument
542 const struct dc_plane_state *plane_state = pipe_ctx->plane_state; in calculate_viewport()
543 const struct dc_stream_state *stream = pipe_ctx->stream; in calculate_viewport()
544 struct scaler_data *data = &pipe_ctx->plane_res.scl_data; in calculate_viewport()
549 bool pri_split = pipe_ctx->bottom_pipe && in calculate_viewport()
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H A Damdgpu_dc_link.c1467 static void enable_stream_features(struct pipe_ctx *pipe_ctx) in enable_stream_features() argument
1469 struct dc_stream_state *stream = pipe_ctx->stream; in enable_stream_features()
1490 struct pipe_ctx *pipe_ctx) in enable_link_dp() argument
1492 struct dc_stream_state *stream = pipe_ctx->stream; in enable_link_dp()
1512 if (pipe_ctx->stream->signal == SIGNAL_TYPE_EDP) { in enable_link_dp()
1518 pipe_ctx->stream_res.pix_clk_params.requested_sym_clk = in enable_link_dp()
1532 pipe_ctx, in enable_link_dp()
1533 pipe_ctx->stream->signal)) { in enable_link_dp()
1551 struct pipe_ctx *pipe_ctx) in enable_link_edp() argument
1555 status = enable_link_dp(state, pipe_ctx); in enable_link_edp()
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H A Damdgpu_dc_link_hwss.c106 struct pipe_ctx *pipes = in dp_enable_link_phy()
107 link->dc->current_state->res_ctx.pipe_ctx; in dp_enable_link_phy()
315 struct pipe_ctx *pipes = in dp_retrain_link_dp_test()
316 &link->dc->current_state->res_ctx.pipe_ctx[0]; in dp_retrain_link_dp_test()
400 static bool dp_set_dsc_on_rx(struct pipe_ctx *pipe_ctx, bool enable) in dp_set_dsc_on_rx() argument
402 struct dc *dc = pipe_ctx->stream->ctx->dc; in dp_set_dsc_on_rx()
403 struct dc_stream_state *stream = pipe_ctx->stream; in dp_set_dsc_on_rx()
416 void dp_set_dsc_on_stream(struct pipe_ctx *pipe_ctx, bool enable) in dp_set_dsc_on_stream() argument
418 struct display_stream_compressor *dsc = pipe_ctx->stream_res.dsc; in dp_set_dsc_on_stream()
419 struct dc *dc = pipe_ctx->stream->ctx->dc; in dp_set_dsc_on_stream()
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H A Damdgpu_dc_stream.c239 static void delay_cursor_until_vupdate(struct pipe_ctx *pipe_ctx, struct dc *dc) in delay_cursor_until_vupdate() argument
244 struct dc_stream_state *stream = pipe_ctx->stream; in delay_cursor_until_vupdate()
250 vupdate_line = dc->hwss.get_vupdate_offset_from_vsync(pipe_ctx); in delay_cursor_until_vupdate()
278 struct pipe_ctx *pipe_to_program = NULL; in dc_stream_set_cursor_attributes()
299 struct pipe_ctx *pipe_ctx = &res_ctx->pipe_ctx[i]; in dc_stream_set_cursor_attributes() local
301 if (pipe_ctx->stream != stream) in dc_stream_set_cursor_attributes()
305 pipe_to_program = pipe_ctx; in dc_stream_set_cursor_attributes()
307 delay_cursor_until_vupdate(pipe_ctx, dc); in dc_stream_set_cursor_attributes()
311 dc->hwss.set_cursor_attribute(pipe_ctx); in dc_stream_set_cursor_attributes()
313 dc->hwss.set_cursor_sdr_white_level(pipe_ctx); in dc_stream_set_cursor_attributes()
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H A Damdgpu_dc.c292 struct pipe_ctx *pipe = &dc->current_state->res_ctx.pipe_ctx[i]; in dc_stream_adjust_vmin_vmax()
319 struct pipe_ctx *pipe = in dc_stream_get_crtc_position()
320 &dc->current_state->res_ctx.pipe_ctx[i]; in dc_stream_get_crtc_position()
348 struct pipe_ctx *pipe; in dc_stream_configure_crc()
353 pipe = &dc->current_state->res_ctx.pipe_ctx[i]; in dc_stream_configure_crc()
398 struct pipe_ctx *pipe; in dc_stream_get_crc()
402 pipe = &dc->current_state->res_ctx.pipe_ctx[i]; in dc_stream_get_crc()
423 struct pipe_ctx *pipe_ctx; in dc_stream_set_dyn_expansion() local
426 if (dc->current_state->res_ctx.pipe_ctx[i].stream in dc_stream_set_dyn_expansion()
428 pipe_ctx = &dc->current_state->res_ctx.pipe_ctx[i]; in dc_stream_set_dyn_expansion()
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H A Damdgpu_dc_debug.c324 struct pipe_ctx *pipe_ctx = &res_ctx->pipe_ctx[i]; in context_timing_trace() local
328 if (pipe_ctx->stream == NULL || pipe_ctx->pipe_idx == underlay_idx) in context_timing_trace()
331 pipe_ctx->stream_res.tg->funcs->get_position(pipe_ctx->stream_res.tg, &position); in context_timing_trace()
336 struct pipe_ctx *pipe_ctx = &res_ctx->pipe_ctx[i]; in context_timing_trace() local
338 if (pipe_ctx->stream == NULL || pipe_ctx->pipe_idx == underlay_idx) in context_timing_trace()
342 pipe_ctx->stream_res.tg->inst, in context_timing_trace()
343 pipe_ctx->stream->timing.h_total, in context_timing_trace()
344 pipe_ctx->stream->timing.v_total, in context_timing_trace()
H A Damdgpu_dc_surface.c161 struct pipe_ctx *pipe_ctx = in dc_plane_get_status() local
162 &dc->current_state->res_ctx.pipe_ctx[i]; in dc_plane_get_status()
164 if (pipe_ctx->plane_state != plane_state) in dc_plane_get_status()
167 pipe_ctx->plane_state->status.is_flip_pending = false; in dc_plane_get_status()
173 struct pipe_ctx *pipe_ctx = in dc_plane_get_status() local
174 &dc->current_state->res_ctx.pipe_ctx[i]; in dc_plane_get_status()
176 if (pipe_ctx->plane_state != plane_state) in dc_plane_get_status()
179 dc->hwss.update_pending_status(pipe_ctx); in dc_plane_get_status()
/netbsd-src/sys/external/bsd/drm2/dist/drm/amd/display/dc/basics/
H A Damdgpu_dc_common.c57 bool is_lower_pipe_tree_visible(struct pipe_ctx *pipe_ctx) in is_lower_pipe_tree_visible() argument
59 if (pipe_ctx->plane_state && pipe_ctx->plane_state->visible) in is_lower_pipe_tree_visible()
61 if (pipe_ctx->bottom_pipe && is_lower_pipe_tree_visible(pipe_ctx->bottom_pipe)) in is_lower_pipe_tree_visible()
66 bool is_upper_pipe_tree_visible(struct pipe_ctx *pipe_ctx) in is_upper_pipe_tree_visible() argument
68 if (pipe_ctx->plane_state && pipe_ctx->plane_state->visible) in is_upper_pipe_tree_visible()
70 if (pipe_ctx->top_pipe && is_upper_pipe_tree_visible(pipe_ctx->top_pipe)) in is_upper_pipe_tree_visible()
75 bool is_pipe_tree_visible(struct pipe_ctx *pipe_ctx) in is_pipe_tree_visible() argument
77 if (pipe_ctx->plane_state && pipe_ctx->plane_state->visible) in is_pipe_tree_visible()
79 if (pipe_ctx->top_pipe && is_upper_pipe_tree_visible(pipe_ctx->top_pipe)) in is_pipe_tree_visible()
81 if (pipe_ctx->bottom_pipe && is_lower_pipe_tree_visible(pipe_ctx->bottom_pipe)) in is_pipe_tree_visible()
H A Ddc_common.h35 bool is_lower_pipe_tree_visible(struct pipe_ctx *pipe_ctx);
37 bool is_upper_pipe_tree_visible(struct pipe_ctx *pipe_ctx);
39 bool is_pipe_tree_visible(struct pipe_ctx *pipe_ctx);
/netbsd-src/crypto/external/bsd/openssl.old/dist/engines/
H A De_dasync.c572 struct dasync_pipeline_ctx *pipe_ctx = in dasync_cipher_ctrl_helper() local
575 if (pipe_ctx == NULL) in dasync_cipher_ctrl_helper()
580 pipe_ctx->numpipes = arg; in dasync_cipher_ctrl_helper()
581 pipe_ctx->outbufs = (unsigned char **)ptr; in dasync_cipher_ctrl_helper()
585 pipe_ctx->numpipes = arg; in dasync_cipher_ctrl_helper()
586 pipe_ctx->inbufs = (unsigned char **)ptr; in dasync_cipher_ctrl_helper()
590 pipe_ctx->numpipes = arg; in dasync_cipher_ctrl_helper()
591 pipe_ctx->lens = (size_t *)ptr; in dasync_cipher_ctrl_helper()
597 EVP_CIPHER_CTX_set_cipher_data(ctx, pipe_ctx->inner_cipher_data); in dasync_cipher_ctrl_helper()
600 EVP_CIPHER_CTX_set_cipher_data(ctx, pipe_ctx); in dasync_cipher_ctrl_helper()
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/netbsd-src/sys/external/bsd/drm2/dist/drm/amd/display/dc/dce/
H A Ddmub_psr.c107 struct pipe_ctx *pipe_ctx = NULL; in dmub_setup_psr() local
112 res_ctx->pipe_ctx[i].stream && in dmub_setup_psr()
113 res_ctx->pipe_ctx[i].stream->link && in dmub_setup_psr()
114 res_ctx->pipe_ctx[i].stream->link == link && in dmub_setup_psr()
115 res_ctx->pipe_ctx[i].stream->link->connector_signal == SIGNAL_TYPE_EDP) { in dmub_setup_psr()
116 pipe_ctx = &res_ctx->pipe_ctx[i]; in dmub_setup_psr()
121 if (!pipe_ctx || in dmub_setup_psr()
122 !&pipe_ctx->plane_res || in dmub_setup_psr()
123 !&pipe_ctx->stream_res) in dmub_setup_psr()
144 copy_settings_data->mpcc_inst = pipe_ctx->plane_res.mpcc_inst; in dmub_setup_psr()
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/netbsd-src/crypto/external/bsd/openssl/dist/engines/
H A De_dasync.c633 struct dasync_pipeline_ctx *pipe_ctx = in dasync_cipher_ctrl_helper() local
636 if (pipe_ctx == NULL) in dasync_cipher_ctrl_helper()
647 memcpy(inner_cipher_data, pipe_ctx->inner_cipher_data, sz); in dasync_cipher_ctrl_helper()
648 pipe_ctx->inner_cipher_data = inner_cipher_data; in dasync_cipher_ctrl_helper()
653 pipe_ctx->numpipes = arg; in dasync_cipher_ctrl_helper()
654 pipe_ctx->outbufs = (unsigned char **)ptr; in dasync_cipher_ctrl_helper()
658 pipe_ctx->numpipes = arg; in dasync_cipher_ctrl_helper()
659 pipe_ctx->inbufs = (unsigned char **)ptr; in dasync_cipher_ctrl_helper()
663 pipe_ctx->numpipes = arg; in dasync_cipher_ctrl_helper()
664 pipe_ctx->lens = (size_t *)ptr; in dasync_cipher_ctrl_helper()
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