Searched refs:od_enabled (Results 1 – 14 of 14) sorted by relevance
116 hwmgr->od_enabled = false; in hwmgr_early_init()121 hwmgr->od_enabled = false; in hwmgr_early_init()136 hwmgr->od_enabled = false; in hwmgr_early_init()191 hwmgr->od_enabled = false; in hwmgr_early_init()473 hwmgr->od_enabled = true; in hwmgr_set_user_specify_caps()
1573 if (hwmgr->od_enabled) in vega10_populate_single_gfx_level()1636 if (hwmgr->od_enabled) { in vega10_populate_single_soc_level()1738 if (hwmgr->od_enabled) in vega10_populate_vddc_soc_levels()1774 if (hwmgr->od_enabled) in vega10_populate_single_memory_level()2523 if (hwmgr->od_enabled) { in vega10_init_smc_table()3380 if (hwmgr->od_enabled && data->need_update_dpm_table & DPMTABLE_OD_UPDATE_SCLK) { in vega10_populate_and_upload_sclk_mclk_dpm_levels()3386 if (hwmgr->od_enabled && data->need_update_dpm_table & DPMTABLE_OD_UPDATE_MCLK) { in vega10_populate_and_upload_sclk_mclk_dpm_levels()4614 if (hwmgr->od_enabled) { in vega10_print_clock_levels()4624 if (hwmgr->od_enabled) { in vega10_print_clock_levels()4634 if (hwmgr->od_enabled) { in vega10_print_clock_levels()[all …]
973 if (hwmgr->od_enabled) { in smu7_setup_default_dpm_tables()3775 if (hwmgr->od_enabled && data->need_update_smu7_dpm_table & DPMTABLE_OD_UPDATE_SCLK) { in smu7_populate_and_upload_sclk_mclk_dpm_levels()3782 if (hwmgr->od_enabled && data->need_update_smu7_dpm_table & DPMTABLE_OD_UPDATE_MCLK) { in smu7_populate_and_upload_sclk_mclk_dpm_levels()3817 if (!hwmgr->od_enabled && (dpm_table->dpm_levels[i].value < low_limit in smu7_trim_single_dpm_states()4513 if (hwmgr->od_enabled) { in smu7_print_clock_levels()4522 if (hwmgr->od_enabled) { in smu7_print_clock_levels()4531 if (hwmgr->od_enabled) { in smu7_print_clock_levels()4873 if (!hwmgr->od_enabled) { in smu7_odn_edit_dpm_table()
1107 hwmgr->od_enabled = false; in vega20_od8_set_feature_capabilities()
856 if (!smu->od_enabled || !od_table || !od_settings) in navi10_print_clk_levels()864 if (!smu->od_enabled || !od_table || !od_settings) in navi10_print_clk_levels()872 if (!smu->od_enabled || !od_table || !od_settings) in navi10_print_clk_levels()895 if (!smu->od_enabled || !od_table || !od_settings) in navi10_print_clk_levels()2054 if (!smu->od_enabled) { in navi10_od_edit_dpm_table()
1013 if (hwmgr->od_enabled) { in pp_set_power_limit()1039 if (hwmgr->od_enabled) { in pp_get_power_limit()
766 smu->od_enabled = true; in smu_set_funcs()782 smu->od_enabled =false; in smu_set_funcs()
1078 if (smu->od_enabled) { in smu_v11_0_get_max_power_limit()
380 bool od_enabled; member
799 bool od_enabled; member
3371 if ((is_support_sw_smu(adev) && adev->smu.od_enabled) || in amdgpu_pm_sysfs_init()3372 (!is_support_sw_smu(adev) && hwmgr->od_enabled)) { in amdgpu_pm_sysfs_init()3469 if ((is_support_sw_smu(adev) && adev->smu.od_enabled) || in amdgpu_pm_sysfs_fini()3470 (!is_support_sw_smu(adev) && hwmgr->od_enabled)) in amdgpu_pm_sysfs_fini()
956 if (hwmgr->od_enabled) in fiji_populate_single_graphic_level()1178 if (hwmgr->od_enabled) in fiji_populate_single_memory_level()
925 if (hwmgr->od_enabled) in polaris10_populate_single_graphic_level()1087 if (hwmgr->od_enabled) in polaris10_populate_single_memory_level()
634 if (hwmgr->od_enabled) in tonga_populate_single_graphic_level()982 if (hwmgr->od_enabled) in tonga_populate_single_memory_level()