| /netbsd-src/sys/external/bsd/drm2/dist/drm/nouveau/nvkm/core/ |
| H A D | nouveau_nvkm_core_memory.c | 35 nvkm_memory_tags_put(struct nvkm_memory *memory, struct nvkm_device *device, in nvkm_memory_tags_put() argument
44 kfree(memory->tags); in nvkm_memory_tags_put()
45 memory->tags = NULL; in nvkm_memory_tags_put()
53 nvkm_memory_tags_get(struct nvkm_memory *memory, struct nvkm_device *device, in nvkm_memory_tags_get() argument
61 if ((tags = memory->tags)) { in nvkm_memory_tags_get()
99 *ptags = memory->tags = tags; in nvkm_memory_tags_get()
106 struct nvkm_memory *memory) in nvkm_memory_ctor() argument
108 memory->func = func; in nvkm_memory_ctor()
109 kref_init(&memory->kref); in nvkm_memory_ctor()
115 struct nvkm_memory *memory = container_of(kref, typeof(*memory), kref); in nvkm_memory_del() local
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| /netbsd-src/sys/external/bsd/drm2/dist/drm/nouveau/nvkm/subdev/instmem/ |
| H A D | nouveau_nvkm_subdev_instmem_nv50.c | 52 #define nv50_instobj(p) container_of((p), struct nv50_instobj, base.memory)
69 nv50_instobj_wr32_slow(struct nvkm_memory *memory, u64 offset, u32 data) in nv50_instobj_wr32_slow() argument
71 struct nv50_instobj *iobj = nv50_instobj(memory); in nv50_instobj_wr32_slow()
88 nv50_instobj_rd32_slow(struct nvkm_memory *memory, u64 offset) in nv50_instobj_rd32_slow() argument
90 struct nv50_instobj *iobj = nv50_instobj(memory); in nv50_instobj_rd32_slow()
115 nv50_instobj_wr32(struct nvkm_memory *memory, u64 offset, u32 data) in nv50_instobj_wr32() argument
118 struct nv50_instobj *iobj = nv50_instobj(memory); in nv50_instobj_wr32()
121 iowrite32_native(data, nv50_instobj(memory)->map + offset); in nv50_instobj_wr32()
126 nv50_instobj_rd32(struct nvkm_memory *memory, u64 offset) in nv50_instobj_rd32() argument
129 struct nv50_instobj *iobj = nv50_instobj(memory); in nv50_instobj_rd32()
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| H A D | nouveau_nvkm_subdev_instmem_base.c | 43 struct nvkm_memory *memory = &iobj->memory; in nvkm_instobj_load() local
44 const u64 size = nvkm_memory_size(memory); in nvkm_instobj_load()
48 if (!(map = nvkm_kmap(memory))) { in nvkm_instobj_load()
50 nvkm_wo32(memory, i, iobj->suspend[i / 4]); in nvkm_instobj_load()
54 nvkm_done(memory); in nvkm_instobj_load()
63 struct nvkm_memory *memory = &iobj->memory; in nvkm_instobj_save() local
64 const u64 size = nvkm_memory_size(memory); in nvkm_instobj_save()
72 if (!(map = nvkm_kmap(memory))) { in nvkm_instobj_save()
74 iobj->suspend[i / 4] = nvkm_ro32(memory, i); in nvkm_instobj_save()
78 nvkm_done(memory); in nvkm_instobj_save()
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| H A D | nouveau_nvkm_subdev_instmem_nv04.c | 46 #define nv04_instobj(p) container_of((p), struct nv04_instobj, base.memory)
55 nv04_instobj_wr32(struct nvkm_memory *memory, u64 offset, u32 data) in nv04_instobj_wr32() argument
57 struct nv04_instobj *iobj = nv04_instobj(memory); in nv04_instobj_wr32()
63 nv04_instobj_rd32(struct nvkm_memory *memory, u64 offset) in nv04_instobj_rd32() argument
65 struct nv04_instobj *iobj = nv04_instobj(memory); in nv04_instobj_rd32()
77 nv04_instobj_release(struct nvkm_memory *memory) in nv04_instobj_release() argument
82 nv04_instobj_acquire(struct nvkm_memory *memory) in nv04_instobj_acquire() argument
84 struct nv04_instobj *iobj = nv04_instobj(memory); in nv04_instobj_acquire()
91 nv04_instobj_size(struct nvkm_memory *memory) in nv04_instobj_size() argument
93 return nv04_instobj(memory)->node->length; in nv04_instobj_size()
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| /netbsd-src/sys/external/gpl2/dts/dist/arch/arm64/boot/dts/ti/ |
| H A D | k3-j721e-som-p0.dtsi | 11 memory@80000000 {
12 device_type = "memory";
18 reserved_memory: reserved-memory {
29 mcu_r5fss0_core0_dma_memory_region: r5f-dma-memory@a0000000 {
35 mcu_r5fss0_core0_memory_region: r5f-memory@a0100000 {
41 mcu_r5fss0_core1_dma_memory_region: r5f-dma-memory@a1000000 {
47 mcu_r5fss0_core1_memory_region: r5f-memory@a1100000 {
53 main_r5fss0_core0_dma_memory_region: r5f-dma-memory@a2000000 {
59 main_r5fss0_core0_memory_region: r5f-memory@a2100000 {
65 main_r5fss0_core1_dma_memory_region: r5f-dma-memory@a3000000 {
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| /netbsd-src/external/gpl3/gcc/dist/gcc/config/i386/ |
| H A D | znver.md | 111 (eq_attr "memory" "store")))
116 (eq_attr "memory" "store")))
122 (eq_attr "memory" "both")))
127 (eq_attr "memory" "both")))
133 (eq_attr "memory" "load")))
139 (eq_attr "memory" "both")))
144 (eq_attr "memory" "both")))
163 (eq_attr "memory" "none")))
169 (eq_attr "memory" "!none")))
178 (eq_attr "memory" "none"))))
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| H A D | znver4.md | 100 (eq_attr "memory" "none"))))
107 (eq_attr "memory" "load"))))
114 (eq_attr "memory" "none")))
120 (eq_attr "memory" "load")))
127 (eq_attr "memory" "store")))
133 (eq_attr "memory" "both")))
140 (eq_attr "memory" "load")))
146 (eq_attr "memory" "both")))
154 (eq_attr "memory" "none")))
160 (eq_attr "memory" "load")))
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| H A D | haswell.md | 57 ;; Pentium Pro's five pipelines. Port 2,3 are responsible for memory loads,
58 ;; port 7 for store address calculations, port 4 for memory stores, and
86 ;; imov with memory operands does not use the integer units.
88 ;; units if it has memory operands.
91 (and (eq_attr "memory" "none")
97 (and (eq_attr "memory" "load")
103 (and (eq_attr "memory" "store")
109 (and (eq_attr "memory" "none")
115 (and (eq_attr "memory" "load")
121 (and (eq_attr "memory" "store")
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| H A D | btver2.md | 108 (and (eq_attr "memory" "load")
119 (and (eq_attr "memory" "load")
143 (eq_attr "memory" "none,unknown"))))
149 (eq_attr "memory" "none,unknown")))
156 (eq_attr "memory" "load,both"))))
162 (eq_attr "memory" "load,both")))
169 (eq_attr "memory" "none,unknown"))))
176 (eq_attr "memory" "load"))))
183 (eq_attr "memory" "none,unknown"))))
190 (eq_attr "memory" "load"))))
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| H A D | core2.md | 76 ;; Pentium Pro's five pipelines. Port 2 is responsible for memory loads,
77 ;; port 3 for store address calculations, port 4 for memory stores, and
114 ;; imov with memory operands does not use the integer units.
116 ;; units if it has memory operands.
119 (and (eq_attr "memory" "none")
125 (and (eq_attr "memory" "load")
131 (and (eq_attr "memory" "store")
137 (and (eq_attr "memory" "none")
143 (and (eq_attr "memory" "load")
149 (and (eq_attr "memory" "store")
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| H A D | ppro.md | 72 ;; Simple instructions of the register-memory form have two to three uops.
142 ;; imov with memory operands does not use the integer units.
145 (and (eq_attr "memory" "none")
151 (and (eq_attr "memory" "load")
157 (and (eq_attr "memory" "store")
162 ;; units if it has memory operands.
165 (and (eq_attr "memory" "none")
171 (and (eq_attr "memory" "load")
178 (and (eq_attr "memory" "none")
183 ;; The load and store units need to be reserved when memory operands
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| H A D | bdver3.md | 133 (eq_attr "memory" "none,unknown"))))
138 (eq_attr "memory" "none,unknown")))
144 (eq_attr "memory" "load,both"))))
149 (eq_attr "memory" "load,both")))
155 (eq_attr "memory" "load,both,store")))
163 (eq_attr "memory" "none,unknown"))))
169 (eq_attr "memory" "none,unknown"))))
174 (eq_attr "memory" "load")))
180 (eq_attr "memory" "load"))))
185 (eq_attr "memory" "store")))
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| /netbsd-src/external/gpl3/gcc.old/dist/gcc/config/i386/ |
| H A D | znver1.md | 111 (eq_attr "memory" "store")))
116 (eq_attr "memory" "store")))
122 (eq_attr "memory" "both")))
127 (eq_attr "memory" "both")))
133 (eq_attr "memory" "load")))
139 (eq_attr "memory" "both")))
144 (eq_attr "memory" "both")))
163 (eq_attr "memory" "none")))
169 (eq_attr "memory" "!none")))
178 (eq_attr "memory" "none"))))
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| H A D | haswell.md | 57 ;; Pentium Pro's five pipelines. Port 2,3 are responsible for memory loads,
58 ;; port 7 for store address calculations, port 4 for memory stores, and
86 ;; imov with memory operands does not use the integer units.
88 ;; units if it has memory operands.
91 (and (eq_attr "memory" "none")
97 (and (eq_attr "memory" "load")
103 (and (eq_attr "memory" "store")
109 (and (eq_attr "memory" "none")
115 (and (eq_attr "memory" "load")
121 (and (eq_attr "memory" "store")
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| H A D | btver2.md | 108 (and (eq_attr "memory" "load")
119 (and (eq_attr "memory" "load")
143 (eq_attr "memory" "none,unknown"))))
149 (eq_attr "memory" "none,unknown")))
156 (eq_attr "memory" "load,both"))))
162 (eq_attr "memory" "load,both")))
169 (eq_attr "memory" "none,unknown"))))
176 (eq_attr "memory" "load"))))
183 (eq_attr "memory" "none,unknown"))))
190 (eq_attr "memory" "load"))))
[all …]
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| H A D | core2.md | 76 ;; Pentium Pro's five pipelines. Port 2 is responsible for memory loads,
77 ;; port 3 for store address calculations, port 4 for memory stores, and
114 ;; imov with memory operands does not use the integer units.
116 ;; units if it has memory operands.
119 (and (eq_attr "memory" "none")
125 (and (eq_attr "memory" "load")
131 (and (eq_attr "memory" "store")
137 (and (eq_attr "memory" "none")
143 (and (eq_attr "memory" "load")
149 (and (eq_attr "memory" "store")
[all …]
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| H A D | ppro.md | 72 ;; Simple instructions of the register-memory form have two to three uops.
142 ;; imov with memory operands does not use the integer units.
145 (and (eq_attr "memory" "none")
151 (and (eq_attr "memory" "load")
157 (and (eq_attr "memory" "store")
162 ;; units if it has memory operands.
165 (and (eq_attr "memory" "none")
171 (and (eq_attr "memory" "load")
178 (and (eq_attr "memory" "none")
183 ;; The load and store units need to be reserved when memory operands
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| H A D | bdver3.md | 133 (eq_attr "memory" "none,unknown"))))
138 (eq_attr "memory" "none,unknown")))
144 (eq_attr "memory" "load,both"))))
149 (eq_attr "memory" "load,both")))
155 (eq_attr "memory" "load,both,store")))
163 (eq_attr "memory" "none,unknown"))))
169 (eq_attr "memory" "none,unknown"))))
174 (eq_attr "memory" "load")))
180 (eq_attr "memory" "load"))))
185 (eq_attr "memory" "store")))
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| /netbsd-src/sys/external/bsd/drm2/dist/drm/nouveau/nvkm/subdev/mmu/ |
| H A D | nouveau_nvkm_subdev_mmu_mem.c | 27 #define nvkm_mem(p) container_of((p), struct nvkm_mem, memory)
38 struct nvkm_memory memory; member
57 nvkm_mem_target(struct nvkm_memory *memory) in nvkm_mem_target() argument
59 return nvkm_mem(memory)->target; in nvkm_mem_target()
63 nvkm_mem_page(struct nvkm_memory *memory) in nvkm_mem_page() argument
69 nvkm_mem_addr(struct nvkm_memory *memory) in nvkm_mem_addr() argument
71 struct nvkm_mem *mem = nvkm_mem(memory); in nvkm_mem_addr()
78 nvkm_mem_size(struct nvkm_memory *memory) in nvkm_mem_size() argument
80 return nvkm_mem(memory)->pages << PAGE_SHIFT; in nvkm_mem_size()
84 nvkm_mem_map_dma(struct nvkm_memory *memory, u64 offset, struct nvkm_vmm *vmm, in nvkm_mem_map_dma() argument
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| H A D | nouveau_nvkm_subdev_mmu_umem.c | 43 struct nvkm_memory *memory = NULL; in nvkm_umem_search() local
53 memory = nvkm_memory_ref(umem->memory); in nvkm_umem_search()
62 memory = nvkm_memory_ref(umem->memory); in nvkm_umem_search()
65 return memory ? memory : ERR_PTR(-ENOENT); in nvkm_umem_search()
115 int ret = nvkm_mem_map_host(umem->memory, &umem->dmat, in nvkm_umem_map()
118 int ret = nvkm_mem_map_host(umem->memory, &umem->map); in nvkm_umem_map()
127 *length = nvkm_memory_size(umem->memory); in nvkm_umem_map()
134 int ret = mmu->func->mem.umap(mmu, umem->memory, argv, argc, in nvkm_umem_map()
137 int ret = mmu->func->mem.umap(mmu, umem->memory, argv, argc, in nvkm_umem_map()
159 nvkm_memory_unref(&umem->memory); in nvkm_umem_dtor()
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| /netbsd-src/external/gpl3/gdb/dist/sim/ppc/ |
| H A D | hw_core.c | 54 core *memory = (core*)device_data(me); in hw_core_init_address_callback() local
55 core_init(memory); in hw_core_init_address_callback()
68 core *memory = (core*)device_data(me); in hw_core_attach_address_callback() local
71 core_attach(memory, in hw_core_attach_address_callback()
88 core *memory = (core*)device_data(me); in hw_core_dma_read_buffer_callback() local
89 return core_map_read_buffer(core_readable(memory), in hw_core_dma_read_buffer_callback()
104 core *memory = (core*)device_data(me); in hw_core_dma_write_buffer_callback() local
106 ? core_readable(memory) in hw_core_dma_write_buffer_callback()
107 : core_writeable(memory)); in hw_core_dma_write_buffer_callback()
133 core *memory = core_create(); in hw_core_create() local
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| /netbsd-src/external/gpl3/gdb.old/dist/sim/ppc/ |
| H A D | hw_core.c | 54 core *memory = (core*)device_data(me); in hw_core_init_address_callback() local
55 core_init(memory); in hw_core_init_address_callback()
68 core *memory = (core*)device_data(me); in hw_core_attach_address_callback() local
71 core_attach(memory, in hw_core_attach_address_callback()
88 core *memory = (core*)device_data(me); in hw_core_dma_read_buffer_callback() local
89 return core_map_read_buffer(core_readable(memory), in hw_core_dma_read_buffer_callback()
104 core *memory = (core*)device_data(me); in hw_core_dma_write_buffer_callback() local
106 ? core_readable(memory) in hw_core_dma_write_buffer_callback()
107 : core_writeable(memory)); in hw_core_dma_write_buffer_callback()
133 core *memory = core_create(); in hw_core_create() local
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| /netbsd-src/sys/external/bsd/drm2/dist/drm/ |
| H A D | drm_agpsupport.c | 222 struct agp_memory *memory; in drm_agp_alloc_hook() local
234 memory = agp_allocate_memory(dev->agp->bridge, pages, type); in drm_agp_alloc_hook()
235 if (!memory) { in drm_agp_alloc_hook()
242 entry->handle = (unsigned long)memory->am_id + 1; in drm_agp_alloc_hook()
244 entry->handle = (unsigned long)memory->key + 1; in drm_agp_alloc_hook()
246 entry->memory = memory; in drm_agp_alloc_hook()
249 list_add(&entry->head, &dev->agp->memory); in drm_agp_alloc_hook()
255 agp_memory_info(dev->agp->bridge, memory, &info); in drm_agp_alloc_hook()
259 request->physical = memory->physical; in drm_agp_alloc_hook()
289 list_for_each_entry(entry, &dev->agp->memory, head) { in drm_agp_lookup_entry()
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| /netbsd-src/external/ibm-public/postfix/dist/src/util/ |
| H A D | vstream_test.ref | 16 memory stream test prep: prefill the VSTRING
19 memory stream test: open the VSTRING for writing, overwrite, close
20 initial memory VSTREAM write offset: 0/8
21 final memory VSTREAM write offset: 5/8
24 memory stream test: open the VSTRING for append, write multiple, then overwrite 1
25 initial memory VSTREAM write offset: 5/8
26 final memory VSTREAM write offset: 11/16
32 memory stream test: open VSTRING for reading, then read
33 initial memory VSTREAM read offset: 0/11
34 reading memory VSTREAM: hello world
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| /netbsd-src/sys/external/bsd/drm2/dist/drm/nouveau/nvkm/subdev/fb/ |
| H A D | nouveau_nvkm_subdev_fb_ram.c | 29 #define nvkm_vram(p) container_of((p), struct nvkm_vram, memory)
38 struct nvkm_memory memory; member
45 nvkm_vram_map(struct nvkm_memory *memory, u64 offset, struct nvkm_vmm *vmm, in nvkm_vram_map() argument
48 struct nvkm_vram *vram = nvkm_vram(memory); in nvkm_vram_map()
50 .memory = &vram->memory, in nvkm_vram_map()
59 nvkm_vram_size(struct nvkm_memory *memory) in nvkm_vram_size() argument
61 return (u64)nvkm_mm_size(nvkm_vram(memory)->mn) << NVKM_RAM_MM_SHIFT; in nvkm_vram_size()
65 nvkm_vram_addr(struct nvkm_memory *memory) in nvkm_vram_addr() argument
67 struct nvkm_vram *vram = nvkm_vram(memory); in nvkm_vram_addr()
74 nvkm_vram_page(struct nvkm_memory *memory) in nvkm_vram_page() argument
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