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Searched refs:lb_params (Results 1 – 10 of 10) sorted by relevance

/netbsd-src/sys/external/bsd/drm2/dist/drm/amd/display/dc/dcn10/
H A Damdgpu_dcn10_dpp_dscl.c208 const struct line_buffer_params *lb_params, in dpp1_dscl_set_lb() argument
214 uint32_t pixel_depth = dpp1_dscl_get_pixel_depth_val(lb_params->depth); in dpp1_dscl_set_lb()
215 uint32_t dyn_pix_depth = lb_params->dynamic_pixel_depth; in dpp1_dscl_set_lb()
219 PIXEL_EXPAN_MODE, lb_params->pixel_expan_mode, /* Pixel expansion mode */ in dpp1_dscl_set_lb()
223 INTERLEAVE_EN, lb_params->interleave_en, /* Interleave source enable */ in dpp1_dscl_set_lb()
224 LB_DATA_FORMAT__ALPHA_EN, lb_params->alpha_en); /* Alpha enable */ in dpp1_dscl_set_lb()
229 INTERLEAVE_EN, lb_params->interleave_en, /* Interleave source enable */ in dpp1_dscl_set_lb()
230 LB_DATA_FORMAT__ALPHA_EN, lb_params->alpha_en); /* Alpha enable */ in dpp1_dscl_set_lb()
435 lb_bpc = dpp1_dscl_get_lb_depth_bpc(scl_data->lb_params.depth); in dpp1_dscl_calc_lb_num_partitions()
462 if (scl_data->lb_params.alpha_en in dpp1_dscl_calc_lb_num_partitions()
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H A Damdgpu_dcn10_hw_sequencer.c2226 pipe_ctx->plane_res.scl_data.lb_params.alpha_en = per_pixel_alpha; in update_scaler()
2227 pipe_ctx->plane_res.scl_data.lb_params.depth = LB_PIXEL_DEPTH_30BPP; in update_scaler()
/netbsd-src/sys/external/bsd/drm2/dist/drm/amd/display/dc/inc/hw/
H A Dtransform.h183 struct line_buffer_params lb_params; member
/netbsd-src/sys/external/bsd/drm2/dist/drm/amd/display/dc/dce/
H A Damdgpu_dce_transform.c404 REG_UPDATE(LB_DATA_FORMAT, ALPHA_EN, data->lb_params.alpha_en); in dce_transform_set_scaler()
911 scl_data->lb_params.depth, in dce_transform_get_optimal_number_of_taps()
/netbsd-src/sys/external/bsd/drm2/dist/drm/amd/display/dc/dcn20/
H A Damdgpu_dcn20_dpp.c315 if (scl_data->lb_params.alpha_en in dscl2_calc_lb_num_partitions()
H A Damdgpu_dcn20_hwseq.c1389 pipe_ctx->plane_res.scl_data.lb_params.alpha_en = pipe_ctx->plane_state->per_pixel_alpha; in dcn20_update_dchubp_dpp()
1390 ASSERT(pipe_ctx->plane_res.scl_data.lb_params.depth == LB_PIXEL_DEPTH_30BPP); in dcn20_update_dchubp_dpp()
/netbsd-src/sys/external/bsd/drm2/dist/drm/amd/display/dc/dce110/
H A Damdgpu_dce110_hw_sequencer.c1249 pipe_ctx->plane_res.scl_data.lb_params.depth, in program_scaler()
1421 pipe_ctx->plane_res.scl_data.lb_params.alpha_en = pipe_ctx->bottom_pipe != 0; in apply_single_controller_ctx_to_hw()
2121 default_adjust.lb_color_depth = pipe_ctx->plane_res.scl_data.lb_params.depth; in set_default_colors()
2499 pipe_ctx->plane_res.scl_data.lb_params.alpha_en = pipe_ctx->bottom_pipe != 0; in dce110_program_front_end_for_pipe()
/netbsd-src/sys/external/bsd/drm2/dist/drm/amd/display/dc/calcs/
H A Damdgpu_dcn_calcs.c403 switch (pipe->plane_res.scl_data.lb_params.depth) { in pipe_ctx_to_e2e_pipe_params()
985 v->lb_bit_per_pixel[input_idx] = tl_lb_bpp_to_int(pipe->plane_res.scl_data.lb_params.depth); in dcn_validate_bandwidth()
/netbsd-src/sys/external/bsd/drm2/dist/drm/amd/display/dc/core/
H A Damdgpu_dc_resource.c1020 pipe_ctx->plane_res.scl_data.lb_params.depth = LB_PIXEL_DEPTH_30BPP; in resource_build_scaling_params()
1042 pipe_ctx->plane_res.scl_data.lb_params.depth = LB_PIXEL_DEPTH_24BPP; in resource_build_scaling_params()
H A Damdgpu_dc.c470 pipes->plane_res.scl_data.lb_params.depth, in dc_stream_set_dither_option()