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Searched refs:jt_offset (Results 1 – 9 of 9) sorted by relevance

/netbsd-src/sys/external/bsd/drm2/dist/drm/amd/amdgpu/
H A Damdgpu_rlc.c208 table_offset = le32_to_cpu(hdr->jt_offset); in amdgpu_gfx_rlc_setup_cp_table()
216 table_offset = le32_to_cpu(hdr->jt_offset); in amdgpu_gfx_rlc_setup_cp_table()
224 table_offset = le32_to_cpu(hdr->jt_offset); in amdgpu_gfx_rlc_setup_cp_table()
232 table_offset = le32_to_cpu(hdr->jt_offset); in amdgpu_gfx_rlc_setup_cp_table()
240 table_offset = le32_to_cpu(hdr->jt_offset); in amdgpu_gfx_rlc_setup_cp_table()
H A Damdgpu_ucode.h125 uint32_t jt_offset; /* jt location */ member
158 uint32_t jt_offset; /* jt location */ member
200 uint32_t jt_offset; /* jt location */ member
H A Damdgpu_ucode.c114 DRM_DEBUG("jt_offset: %u\n", le32_to_cpu(gfx_hdr->jt_offset)); in amdgpu_ucode_print_gfx_hdr()
149 DRM_DEBUG("jt_offset: %u\n", le32_to_cpu(rlc_hdr->jt_offset)); in amdgpu_ucode_print_rlc_hdr()
232 DRM_DEBUG("jt_offset: %u\n", le32_to_cpu(sdma_hdr->jt_offset)); in amdgpu_ucode_print_sdma_hdr()
513 le32_to_cpu(cp_hdr->jt_offset) * 4), in amdgpu_ucode_init_single_fw()
570 (le32_to_cpu(header->jt_offset) * 4); in amdgpu_ucode_patch_jt()
H A Damdgpu_cgs.c243 info->image_size = le32_to_cpu(header->jt_offset) << 2; in amdgpu_cgs_get_firmware_info()
H A Damdgpu_gfx_v10_0.c2155 sdma_hdr->jt_offset, in gfx_v10_0_rlc_backdoor_autoload_copy_sdma_ucode()
2163 sdma_hdr->jt_offset, in gfx_v10_0_rlc_backdoor_autoload_copy_sdma_ucode()
2952 le32_to_cpup(fw_data + mec_hdr->jt_offset + i)); in gfx_v10_0_cp_compute_load_microcode()
H A Damdgpu_gfx_v9_0.c3292 mec_hdr->jt_offset); in gfx_v9_0_cp_compute_load_microcode()
3295 le32_to_cpup(fw_data + mec_hdr->jt_offset + i)); in gfx_v9_0_cp_compute_load_microcode()
/netbsd-src/sys/external/bsd/drm2/dist/drm/radeon/
H A Dradeon_ucode.h188 uint32_t jt_offset; /* jt location */ member
207 uint32_t jt_offset; /* jt location */ member
H A Dradeon_ucode.c104 DRM_DEBUG("jt_offset: %u\n", le32_to_cpu(gfx_hdr->jt_offset)); in radeon_ucode_print_gfx_hdr()
154 DRM_DEBUG("jt_offset: %u\n", le32_to_cpu(sdma_hdr->jt_offset)); in radeon_ucode_print_sdma_hdr()
H A Dradeon_cik.c6462 table_offset = le32_to_cpu(hdr->jt_offset); in cik_init_cp_pg_table()
6468 table_offset = le32_to_cpu(hdr->jt_offset); in cik_init_cp_pg_table()
6474 table_offset = le32_to_cpu(hdr->jt_offset); in cik_init_cp_pg_table()
6480 table_offset = le32_to_cpu(hdr->jt_offset); in cik_init_cp_pg_table()
6486 table_offset = le32_to_cpu(hdr->jt_offset); in cik_init_cp_pg_table()