Home
last modified time | relevance | path

Searched refs:isVectorRegister (Results 1 – 6 of 6) sorted by relevance

/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/AMDGPU/
H A DSIFixSGPRCopies.cpp837 if (TRI->isVectorRegister(*MRI, InputReg)) { in processPHINode()
849 TRI->isVectorRegister(*MRI, Def->getOperand(1).getReg())) { in processPHINode()
869 if ((!TRI->isVectorRegister(*MRI, PHIRes) && in processPHINode()
H A DSIInsertWaitcnts.cpp470 if (TRI->isVectorRegister(*MRI, Op.getReg())) { in getRegInterval()
500 assert(TRI->isVectorRegister(*MRI, MI->getOperand(OpNo).getReg())); in setExpScore()
559 TRI->isVectorRegister(*MRI, Op.getReg())) { in updateByEvent()
617 TRI->isVectorRegister(*MRI, MO.getReg())) { in updateByEvent()
1118 const bool IsVGPR = TRI->isVectorRegister(*MRI, Op.getReg()); in generateWaitcntInstBefore()
H A DSIRegisterInfo.h231 bool isVectorRegister(const MachineRegisterInfo &MRI, Register Reg) const { in isVectorRegister() function
H A DSIPreEmitPeephole.cpp256 TRI->isVectorRegister(MRI, MO.getReg()); in optimizeSetGPR()
H A DGCNHazardRecognizer.cpp627 if (!Use.isReg() || TRI.isVectorRegister(MF.getRegInfo(), Use.getReg())) in checkVMEMHazards()
768 if (!TRI->isVectorRegister(MRI, Def.getReg())) in checkVALUHazardsHelper()
H A DSIISelLowering.cpp4031 if (Src0.isReg() && TRI->isVectorRegister(MRI, Src0.getReg())) { in EmitInstrWithCustomInserter()
4037 if (Src1.isReg() && TRI->isVectorRegister(MRI, Src1.getReg())) { in EmitInstrWithCustomInserter()
4044 if (TRI->isVectorRegister(MRI, Src2.getReg())) { in EmitInstrWithCustomInserter()