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Searched refs:isVectorOnly (Results 1 – 4 of 4) sorted by relevance

/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/AMDGPU/
H A DR600InstrInfo.h96 bool isVectorOnly(unsigned Opcode) const;
97 bool isVectorOnly(const MachineInstr &MI) const;
H A DR600Packetizer.cpp232 !TII->isVectorOnly(MI) && VLIW5) { in isBundlableWithCurrentPMI()
H A DR600MachineScheduler.cpp320 (!AnyALU || !TII->isVectorOnly(*SU->getInstr()))) { in PopInst()
H A DR600InstrInfo.cpp164 bool R600InstrInfo::isVectorOnly(unsigned Opcode) const { in isVectorOnly() function in R600InstrInfo
168 bool R600InstrInfo::isVectorOnly(const MachineInstr &MI) const { in isVectorOnly() function in R600InstrInfo
169 return isVectorOnly(MI.getOpcode()); in isVectorOnly()