Searched refs:isVALU (Results 1 – 5 of 5) sorted by relevance
175 if (SIInstrInfo::isVALU(*MI) && checkVALUHazards(MI) > 0) in getHazardType()187 if ((SIInstrInfo::isVALU(*MI) || SIInstrInfo::isVMEM(*MI) || in getHazardType()289 if (SIInstrInfo::isVALU(*MI)) in PreEmitNoopsCommon()301 if ((SIInstrInfo::isVALU(*MI) || SIInstrInfo::isVMEM(*MI) || in PreEmitNoopsCommon()579 return TII.isVALU(MI); in checkSMRDHazards()624 return TII.isVALU(MI); in checkVMEMHazards()647 return TII->isVALU(MI); in checkDPPHazards()676 return TII->isVALU(MI); in checkDivFMasHazards()837 auto IsHazardFn = [TII](const MachineInstr &MI) { return TII->isVALU(MI); }; in checkRWLaneHazards()885 return SIInstrInfo::isVALU(MI) && Opc != AMDGPU::V_NOP_e32 && in fixVcmpxPermlaneHazards()[all …]
863 bool isVALU(const SUnit *SU) const { in isVALU() function865 return MI && TII->isVALU(*MI); in isVALU()916 if (SUv != From && isVALU(SUv) && canAddEdge(SUv, SU)) in linkSALUChain()
347 static bool isVALU(const MachineInstr &MI) { in isVALU() function351 bool isVALU(uint16_t Opcode) const { in isVALU() function
368 && SIInstrInfo::isVALU(*Def); in emitIfBreak()
3666 if (SIInstrInfo::isVALU(MI)) { in shouldReadExec()4641 if (isVALU(MI) && usesConstantBus(MRI, *MO, OpInfo)) { in isOperandLegal()7107 if (isVALU(MI) || isSALU(MI)) { in getInstSizeInBytes()