| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/XCore/ |
| H A D | XCoreInstrInfo.h | 49 unsigned isStoreToStackSlot(const MachineInstr &MI,
|
| H A D | XCoreInstrInfo.cpp | 82 unsigned XCoreInstrInfo::isStoreToStackSlot(const MachineInstr &MI, in isStoreToStackSlot() function in XCoreInstrInfo
|
| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/Sparc/ |
| H A D | SparcInstrInfo.h | 64 unsigned isStoreToStackSlot(const MachineInstr &MI,
|
| H A D | SparcInstrInfo.cpp | 62 unsigned SparcInstrInfo::isStoreToStackSlot(const MachineInstr &MI, in isStoreToStackSlot() function in SparcInstrInfo
|
| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/ARC/ |
| H A D | ARCInstrInfo.h | 48 unsigned isStoreToStackSlot(const MachineInstr &MI,
|
| H A D | ARCInstrInfo.cpp | 87 unsigned ARCInstrInfo::isStoreToStackSlot(const MachineInstr &MI, in isStoreToStackSlot() function in ARCInstrInfo
|
| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/VE/ |
| H A D | VEInstrInfo.h | 89 unsigned isStoreToStackSlot(const MachineInstr &MI,
|
| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/Mips/ |
| H A D | MipsSEInstrInfo.h | 42 unsigned isStoreToStackSlot(const MachineInstr &MI,
|
| H A D | Mips16InstrInfo.h | 48 unsigned isStoreToStackSlot(const MachineInstr &MI,
|
| H A D | Mips16InstrInfo.cpp | 64 unsigned Mips16InstrInfo::isStoreToStackSlot(const MachineInstr &MI, in isStoreToStackSlot() function in Mips16InstrInfo
|
| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/AVR/ |
| H A D | AVRInstrInfo.h | 88 unsigned isStoreToStackSlot(const MachineInstr &MI,
|
| H A D | AVRInstrInfo.cpp | 101 unsigned AVRInstrInfo::isStoreToStackSlot(const MachineInstr &MI, in isStoreToStackSlot() function in llvm::AVRInstrInfo
|
| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/Lanai/ |
| H A D | LanaiInstrInfo.h | 47 unsigned isStoreToStackSlot(const MachineInstr &MI,
|
| H A D | LanaiInstrInfo.cpp | 746 unsigned LanaiInstrInfo::isStoreToStackSlot(const MachineInstr &MI, in isStoreToStackSlot() function in LanaiInstrInfo
|
| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/X86/ |
| H A D | X86InstrInfo.h | 224 unsigned isStoreToStackSlot(const MachineInstr &MI, 226 unsigned isStoreToStackSlot(const MachineInstr &MI,
|
| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/RISCV/ |
| H A D | RISCVInstrInfo.h | 36 unsigned isStoreToStackSlot(const MachineInstr &MI,
|
| /netbsd-src/external/apache2/llvm/dist/llvm/include/llvm/CodeGen/ |
| H A D | TargetInstrInfo.h | 294 virtual unsigned isStoreToStackSlot(const MachineInstr &MI, in isStoreToStackSlot() function 303 virtual unsigned isStoreToStackSlot(const MachineInstr &MI, in isStoreToStackSlot() function 307 return isStoreToStackSlot(MI, FrameIndex); in isStoreToStackSlot()
|
| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/SystemZ/ |
| H A D | SystemZInstrInfo.h | 222 unsigned isStoreToStackSlot(const MachineInstr &MI,
|
| /netbsd-src/external/apache2/llvm/dist/llvm/lib/CodeGen/ |
| H A D | InlineSpiller.cpp | 319 if (SnipLI.reg() == TII.isStoreToStackSlot(MI, FI) && FI == StackSlot) in isSnippet() 492 if (Reg == TII.isStoreToStackSlot(MI, FI) && FI == StackSlot) { in eliminateRedundantSpills() 755 InstrReg = TII.isStoreToStackSlot(*MI, FI); in coalesceStackAccess() 924 if (TII.isStoreToStackSlot(*MI, FI) && in foldMemoryOperand()
|
| H A D | StackSlotColoring.cpp | 455 if (!(StoreReg = TII->isStoreToStackSlot(*NextMI, SecondSS, StoreSize))) in RemoveDeadStores()
|
| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/Hexagon/ |
| H A D | HexagonInstrInfo.h | 65 unsigned isStoreToStackSlot(const MachineInstr &MI,
|
| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/AArch64/ |
| H A D | AArch64InstrInfo.h | 63 unsigned isStoreToStackSlot(const MachineInstr &MI,
|
| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/PowerPC/ |
| H A D | PPCInstrInfo.h | 400 unsigned isStoreToStackSlot(const MachineInstr &MI,
|
| H A D | README_ALTIVEC.txt | 3 Implement PPCInstrInfo::isLoadFromStackSlot/isStoreToStackSlot for vector
|
| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/ARM/ |
| H A D | ARMBaseInstrInfo.h | 192 unsigned isStoreToStackSlot(const MachineInstr &MI,
|