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Searched refs:isRegMask (Results 1 – 25 of 47) sorted by relevance

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/netbsd-src/external/apache2/llvm/dist/llvm/include/llvm/CodeGen/
H A DLiveRegUnits.h52 if (O->isRegMask()) in accumulateUsedDefed()
169 return MOP.isRegMask() || (MOP.isReg() && !MOP.isDebug() && in phys_regs_and_masks()
H A DMachineOperand.h345 bool isRegMask() const { return OpKind == MO_RegisterMask; } in isRegMask() function
631 assert(isRegMask() && "Wrong MachineOperand accessor"); in getRegMask()
699 assert(isRegMask() && "Wrong MachineOperand mutator"); in setRegMask()
/netbsd-src/external/apache2/llvm/dist/llvm/lib/CodeGen/
H A DLiveRegUnits.cpp43 if (MOP.isRegMask()) { in stepBackward()
63 if (MOP.isRegMask()) { in accumulate()
H A DLivePhysRegs.cpp47 if (MOP.isRegMask()) { in removeDefs()
98 } else if (O->isRegMask()) in stepForward()
108 if (Reg.second->isRegMask() && in stepForward()
H A DRegUsageInfoPropagate.cpp71 if (MO.isRegMask()) in setRegMask()
H A DMachineCopyPropagation.cpp213 if (MO.isRegMask()) in findAvailBackwardCopy()
239 if (MO.isRegMask()) in findAvailCopy()
669 if (MO.isRegMask()) in ForwardCopyPropagateBlock()
H A DDeadMachineInstructionElim.cpp171 } else if (MO.isRegMask()) { in eliminateDeadMI()
H A DCriticalAntiDepBreaker.cpp259 if (MO.isRegMask()) { in ScanInstruction()
369 if (CheckOper.isRegMask() && CheckOper.clobbersPhysReg(NewReg)) in isNewRegClobberedByRefs()
H A DMachineCSE.cpp236 if (MO.isRegMask() && MO.clobbersPhysReg(Reg)) in isPhysDefTriviallyDead()
378 if (MO.isRegMask()) in PhysRegDefsReach()
H A DRegisterScavenging.cpp121 if (MO.isRegMask()) { in determineKillsAndDefs()
309 if (MO.isRegMask()) in findSurvivorReg()
H A DMachineInstrBundle.cpp317 if (MO.isRegMask() && MO.clobbersPhysReg(Reg)) { in AnalyzePhysRegInBundle()
H A DShrinkWrap.cpp293 } else if (MO.isRegMask()) { in INITIALIZE_PASS_DEPENDENCY()
H A DMachineInstr.cpp241 assert((isImpReg || Op.isRegMask() || MCID->isVariadic() || in addOperand()
1048 if (isPhys && Overlap && MO.isRegMask() && MO.clobbersPhysReg(Reg)) in findRegisterDefOperandIdx()
1493 if ((MO.isReg() && MO.isImplicit()) || MO.isRegMask()) in copyImplicitOps()
2048 if (MO.isRegMask()) { in setPhysRegsDeadExcept()
H A DRDFRegisters.cpp80 if (Op.isRegMask()) in PhysicalRegisterInfo()
H A DImplicitNullChecks.cpp242 auto IsRegMask = [](const MachineOperand &MO) { return MO.isRegMask(); }; in canHandle()
H A DVirtRegMap.cpp538 if (MO.isRegMask()) in rewrite()
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/X86/
H A DX86VZeroUpper.cpp160 if (MI.isCall() && MO.isRegMask() && !clobbersAllYmmAndZmmRegs(MO)) in hasYmmOrZmmReg()
176 if (MO.isRegMask()) in callHasRegMask()
H A DX86PreTileConfig.cpp103 MI.operands(), [](MachineOperand &MO) { return MO.isRegMask(); }); in isDestructiveCall()
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/PowerPC/
H A DPPCCTRLoops.cpp89 } else if (MO.isRegMask()) { in clobbersCTR()
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/Hexagon/
H A DHexagonVLIWPacketizer.cpp797 if (MO.isRegMask() && MO.clobbersPhysReg(DepReg)) in canPromoteToNewValueStore()
840 if (CheckDef && MO.isRegMask() && MO.clobbersPhysReg(DepReg)) in isImplicitDependency()
1277 if (!OpJ.isRegMask()) in hasRegMaskDependence()
1284 } else if (OpI.isRegMask()) { in hasRegMaskDependence()
1600 } else if (!Op.isRegMask()) { in isLegalToPacketizeTogether()
H A DRDFDeadCode.cpp69 if (Op.isRegMask()) { in isLiveInstr()
H A DHexagonBlockRanges.cpp351 if (!Op.isRegMask()) in computeInitialLiveRanges()
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/AArch64/
H A DAArch64A57FPLoadBalancing.cpp561 } else if (U.isRegMask()) { in colorChain()
697 } else if (MO.isRegMask()) { in maybeKillChain()
H A DAArch64CollectLOH.cpp502 if (MO.isRegMask()) { in handleNormalInst()
/netbsd-src/external/apache2/llvm/dist/llvm/lib/CodeGen/AsmPrinter/
H A DDbgEntityHistoryCalculator.cpp513 } else if (MO.isRegMask()) { in calculateDbgEntityHistory()

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