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Searched refs:isInt (Results 1 – 25 of 171) sorted by relevance

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/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/X86/AsmParser/
H A DX86AsmParserCommon.h17 return isInt<8>(Value) || in isImmSExti16i8Value()
18 (isUInt<16>(Value) && isInt<8>(static_cast<int16_t>(Value))); in isImmSExti16i8Value()
22 return isInt<8>(Value) || in isImmSExti32i8Value()
23 (isUInt<32>(Value) && isInt<8>(static_cast<int32_t>(Value))); in isImmSExti32i8Value()
27 return isInt<8>(Value); in isImmSExti64i8Value()
31 return isInt<32>(Value); in isImmSExti64i32Value()
35 return isUInt<8>(Value) || isInt<8>(Value); in isImmUnsignedi8Value()
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/Mips/MCTargetDesc/
H A DMipsAsmBackend.cpp81 if (!isInt<16>(Value)) { in adjustFixupValue()
91 if (!isInt<19>(Value)) { in adjustFixupValue()
130 if (!isInt<7>(Value)) { in adjustFixupValue()
140 if (!isInt<10>(Value)) { in adjustFixupValue()
150 if (!isInt<16>(Value)) { in adjustFixupValue()
159 if (!isInt<18>(Value)) { in adjustFixupValue()
172 if (!isInt<18>(Value)) { in adjustFixupValue()
181 if (!isInt<21>(Value)) { in adjustFixupValue()
190 if (!isInt<26>(Value)) { in adjustFixupValue()
199 if (!isInt<26>(Value)) { in adjustFixupValue()
[all …]
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/Mips/
H A DMipsInstrInfo.cpp306 return isInt<18>(BrOffset); in isBranchOffsetInRange()
322 return isInt<17>(BrOffset); in isBranchOffsetInRange()
326 return isInt<11>(BrOffset); in isBranchOffsetInRange()
330 return isInt<8>(BrOffset); in isBranchOffsetInRange()
335 return isInt<28>(BrOffset); in isBranchOffsetInRange()
359 return isInt<18>(BrOffset); in isBranchOffsetInRange()
363 return isInt<23>(BrOffset); in isBranchOffsetInRange()
367 return isInt<11>(BrOffset); in isBranchOffsetInRange()
371 return isInt<8>(BrOffset); in isBranchOffsetInRange()
375 return isInt<27>(BrOffset); in isBranchOffsetInRange()
[all …]
H A DMips16InstrInfo.cpp232 if (isInt<16>(-Remainder)) in makeFrame()
258 if (isInt<16>(Remainder)) in restoreFrame()
312 if (isInt<16>(Amount)) // need to change to addiu sp, ....and isInt<16> in adjustStackPtr()
485 return isInt<16>(Amount); in validImmediate()
488 return isInt<16>(Amount); in validImmediate()
489 return isInt<15>(Amount); in validImmediate()
H A DMipsSERegisterInfo.cpp216 if (OffsetBitSize < 16 && isInt<16>(Offset) && in eliminateFI()
236 } else if (!isInt<16>(Offset)) { in eliminateFI()
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/Lanai/
H A DLanaiISelDAGToDAG.cpp96 return isInt<21>(CN.getSExtValue()) && ((CN.getSExtValue() & 0x3) == 0); in canBeRepresentedAsSls()
129 if (isInt<16>(CN->getSExtValue())) { in selectAddrRiSpls()
142 if (isInt<10>(CN->getSExtValue())) { in selectAddrRiSpls()
173 if ((RiMode && isInt<16>(CN->getSExtValue())) || in selectAddrRiSpls()
174 (!RiMode && isInt<10>(CN->getSExtValue()))) { in selectAddrRiSpls()
228 if (isInt<16>(CN->getSExtValue())) in selectAddrRr()
H A DLanaiTargetTransformInfo.h57 if (isInt<16>(Imm.getSExtValue())) in getIntImmCost()
59 if (isInt<21>(Imm.getZExtValue())) in getIntImmCost()
61 if (isInt<32>(Imm.getSExtValue())) { in getIntImmCost()
H A DLanaiRegisterInfo.cpp165 if ((isSPLSOpcode(MI.getOpcode()) && !isInt<10>(Offset)) || in eliminateFrameIndex()
166 !isInt<16>(Offset)) { in eliminateFrameIndex()
181 if (!isInt<16>(Offset)) { in eliminateFrameIndex()
H A DLanaiMemAluCombiner.cpp314 ((IsSpls && isInt<10>(Op2.getImm())) || in isSuitableAluInstr()
315 (!IsSpls && isInt<16>(Op2.getImm())))) || in isSuitableAluInstr()
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/ARC/
H A DARCFrameLowering.cpp67 else if (isInt<12>(AbsAmount)) in generateStackAdjustment()
140 else if (isInt<12>(VarArgsBytes)) in emitPrologue()
285 else if (isInt<12>(MoveAmount)) in emitEpilogue()
300 else if (isInt<12>(4 * StackSlotsUsedByFunclet)) in emitEpilogue()
327 else if (isInt<12>(VarArgsBytes)) in emitEpilogue()
457 else if (isInt<12>(NumBytes)) in emitRegUpdate()
H A DARCISelDAGToDAG.cpp111 if (!isInt<9>(RHSC)) in SelectAddrModeS9()
174 isInt<12>(CVal) ? ARC::MOV_rs12 : ARC::MOV_rlimm, in Select()
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/Hexagon/
H A DHexagonOperands.td13 def s8_0Imm64Pred : PatLeaf<(i64 imm), [{ return isInt<8>(N->getSExtValue()); }]>;
20 return isInt<32>(v);
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Transforms/InstCombine/
H A DInstCombineAddSub.cpp74 bool isZero() const { return isInt() ? !IntVal : getFpVal().isZero(); } in isZero()
77 bool isOne() const { return isInt() && IntVal == 1; } in isOne()
78 bool isTwo() const { return isInt() && IntVal == 2; } in isTwo()
79 bool isMinusOne() const { return isInt() && IntVal == -1; } in isMinusOne()
80 bool isMinusTwo() const { return isInt() && IntVal == -2; } in isMinusTwo()
101 bool isInt() const { return !IsFp; } in isInt() function in __anon0831a0f10111::FAddendCoef
232 if (isInt()) { in set()
243 if (!isInt()) in convertToFpType()
267 if (That.isInt()) in operator =()
275 if (isInt() == That.isInt()) { in operator +=()
[all …]
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/SystemZ/
H A DSystemZOperands.td365 return isInt<8>(N->getSExtValue());
379 return isInt<16>(N->getSExtValue());
383 return isInt<16>(-N->getSExtValue());
400 return isInt<32>(-N->getSExtValue());
476 return isInt<8>(N->getSExtValue());
484 return isInt<16>(N->getSExtValue());
488 return isInt<16>(-N->getSExtValue());
496 return isInt<32>(N->getSExtValue());
500 return isInt<32>(-N->getSExtValue());
H A DSystemZTargetTransformInfo.cpp51 if (isInt<32>(Imm.getSExtValue())) in getIntImmCost()
97 if (isInt<16>(Imm.getSExtValue())) in getIntImmCostInst()
104 if (isInt<32>(Imm.getSExtValue())) in getIntImmCostInst()
125 if (isInt<32>(Imm.getSExtValue())) in getIntImmCostInst()
220 if (isInt<32>(Imm.getSExtValue())) in getIntImmCostIntrin()
225 if ((Idx < 2) || (Imm.getBitWidth() <= 64 && isInt<64>(Imm.getSExtValue()))) in getIntImmCostIntrin()
230 if ((Idx < 4) || (Imm.getBitWidth() <= 64 && isInt<64>(Imm.getSExtValue()))) in getIntImmCostIntrin()
H A DSystemZInstrInfo.cpp1019 isInt<8>(MI.getOperand(2).getImm()) && !MI.getOperand(3).getReg()) { in foldMemoryOperandImpl()
1044 isInt<8>(MI.getOperand(2).getImm())) { in foldMemoryOperandImpl()
1058 isInt<8>((int32_t)MI.getOperand(2).getImm())) || in foldMemoryOperandImpl()
1060 isInt<8>((int64_t)MI.getOperand(2).getImm()))) { in foldMemoryOperandImpl()
1073 isInt<8>((int32_t)-MI.getOperand(2).getImm())) || in foldMemoryOperandImpl()
1075 isInt<8>((int64_t)-MI.getOperand(2).getImm()))) { in foldMemoryOperandImpl()
1631 if (isInt<20>(Offset) && isInt<20>(Offset2)) { in getOpcodeForOffset()
1720 if (!(MI && isInt<8>(MI->getOperand(1).getImm()))) in getFusedCompare()
1927 if (isInt<16>(Value)) in loadImmediate()
1935 assert(isInt<32>(Value) && "Huge values not handled yet"); in loadImmediate()
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/M68k/MCTargetDesc/
H A DM68kAsmBackend.cpp172 if (!isInt<16>(Value)) { in fixupNeedsRelaxation()
182 return Value == 0 || !isInt<8>(Value); in fixupNeedsRelaxation()
/netbsd-src/external/apache2/llvm/dist/llvm/lib/ExecutionEngine/RuntimeDyld/Targets/
H A DRuntimeDyldCOFFAArch64.h318 assert(isInt<28>(PCRelVal) && "Branch target is out of range."); in resolveRelocation()
327 assert(isInt<21>(PCRelVal) && "Branch target is out of range."); in resolveRelocation()
336 assert(isInt<16>(PCRelVal) && "Branch target is out of range."); in resolveRelocation()
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/VE/
H A DVEISelDAGToDAG.cpp231 if (isInt<32>(CN->getSExtValue())) { in selectADDRzii()
262 if (isInt<32>(CN->getSExtValue())) { in selectADDRzi()
314 if (isInt<32>(CN->getSExtValue())) { in matchADDRri()
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/X86/
H A DX86OptimizeLEAs.cpp357 if (!isInt<32>(AddrDispShiftTemp)) in chooseBestLEA()
379 if (BestLEA != nullptr && !isInt<8>(AddrDispShiftTemp) && in chooseBestLEA()
380 isInt<8>(AddrDispShift)) in chooseBestLEA()
472 !isInt<32>(MI.getOperand(MemOpNo + X86::AddrDisp).getImm() + in isReplaceable()
H A DX86WinAllocaExpander.cpp194 return isInt<8>(Amount) ? X86::SUB64ri8 : X86::SUB64ri32; in getSubOpcode()
195 return isInt<8>(Amount) ? X86::SUB32ri8 : X86::SUB32ri; in getSubOpcode()
/netbsd-src/external/apache2/llvm/dist/llvm/include/llvm/Support/
H A DMathExtras.h363 template <unsigned N> constexpr inline bool isInt(int64_t x) {
367 template <> constexpr inline bool isInt<8>(int64_t x) {
370 template <> constexpr inline bool isInt<16>(int64_t x) {
373 template <> constexpr inline bool isInt<32>(int64_t x) {
383 return isInt<N + S>(x) && (x % (UINT64_C(1) << S) == 0);
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/PowerPC/AsmParser/
H A DPPCAsmParser.cpp321 bool isS5Imm() const { return Kind == Immediate && isInt<5>(getImm()); } in isS5Imm()
354 return isInt<16>(getImmS16Context()); in isS16Imm()
360 (Kind == Immediate && isInt<16>(getImm()) && in isS16ImmX4()
372 (Kind == Immediate && isInt<16>(getImm()) && in isS16ImmX16()
376 (Kind == Immediate && isInt<34>(getImm()) && (getImm() & 15) == 0); in isS34ImmX16()
381 return Kind == Expression || (Kind == Immediate && isInt<34>(getImm())); in isS34Imm()
390 return isInt<17>(getImmS16Context()); in isS17Imm()
404 if (isInt<26>(getImm())) in isDirectBr()
408 if (isUInt<32>(getImm()) && isInt<26>(static_cast<int32_t>(getImm()))) in isDirectBr()
414 (Kind == Immediate && isInt<16>(getImm()) && in isCondBr()
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/BPF/
H A DBPFTargetTransformInfo.h41 if (Imm.getBitWidth() <= 64 && isInt<32>(Imm.getSExtValue())) in getIntImmCost()
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/Lanai/MCTargetDesc/
H A DLanaiMCCodeEmitter.cpp201 assert(isInt<16>(Op2.getImm()) && in getRiMemoryOpValue()
272 assert(isInt<10>(Op2.getImm()) && in getSplsOpValue()

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