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Searched refs:isAligned (Results 1 – 25 of 25) sorted by relevance

/netbsd-src/external/apache2/llvm/dist/llvm/lib/Support/
H A DOptimizedStructLayout.cpp27 assert(isAligned(Field.Alignment, Field.Offset) && in checkValidLayout()
382 if (isAligned(FirstQueueToSearch->Alignment, LastEnd)) in performOptimizedStructLayout()
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Analysis/
H A DLoads.cpp34 static bool isAligned(const Value *Base, const APInt &Offset, Align Alignment, in isAligned() function
93 return isAligned(V, Offset, Alignment, DL); in isDereferenceableAndAlignedPointer()
185 return isAligned(V, Offset, Alignment, DL); in isDereferenceableAndAlignedPointer()
/netbsd-src/external/apache2/llvm/dist/llvm/include/llvm/Support/
H A DAlignment.h138 inline bool isAligned(Align Lhs, uint64_t SizeInBytes) { in isAligned() function
144 return isAligned(Lhs, reinterpret_cast<uintptr_t>(Addr)); in isAddrAligned()
/netbsd-src/external/apache2/llvm/dist/clang/lib/Format/
H A DWhitespaceManager.h53 unsigned StartOfTokenColumn, bool isAligned = false,
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/Mips/
H A DMipsSERegisterInfo.cpp217 (!isIntN(OffsetBitSize, Offset) || !isAligned(OffsetAlign, Offset))) { in eliminateFI()
H A DMipsConstantIslandPass.cpp560 assert(isAligned(Alignment, Size) && "CP Entry not multiple of 4 bytes!"); in doInitialPlacement()
H A DMipsSEISelDAGToDAG.cpp298 if (!isAligned(Alignment, CN->getZExtValue())) in selectAddrFrameIndexOffset()
/netbsd-src/external/apache2/llvm/dist/llvm/lib/IR/
H A DDataLayout.cpp59 if (!isAligned(TyAlign, StructSize)) { in StructLayout()
74 if (!isAligned(StructAlignment, StructSize)) { in StructLayout()
/netbsd-src/external/apache2/llvm/dist/llvm/tools/llvm-exegesis/lib/
H A DAssembler.cpp319 assert(isAligned(kFunctionAlignment, FunctionAddress) && in ExecutableFunction()
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/X86/
H A DX86CallFrameOptimization.cpp225 if (!isAligned(StackAlign, CC.ExpectedDist)) in isProfitable()
H A DX86InstrInfo.cpp3815 bool isAligned = in storeRegToStackSlot() local
3818 unsigned Opc = getStoreRegOpcode(SrcReg, RC, isAligned, Subtarget); in storeRegToStackSlot()
3845 bool isAligned = in loadRegFromStackSlot() local
3848 unsigned Opc = getLoadRegOpcode(DestReg, RC, isAligned, Subtarget); in loadRegFromStackSlot()
6307 bool isAligned = !MMOs.empty() && MMOs.front()->getAlign() >= Alignment; in unfoldMemoryOperand() local
6308 Opc = getLoadRegOpcode(Reg, RC, isAligned, Subtarget); in unfoldMemoryOperand()
6384 bool isAligned = !MMOs.empty() && MMOs.front()->getAlign() >= Alignment; in unfoldMemoryOperand() local
6385 unsigned Opc = getStoreRegOpcode(Reg, DstRC, isAligned, Subtarget); in unfoldMemoryOperand()
6451 bool isAligned = !MMOs.empty() && MMOs.front()->getAlign() >= Alignment; in unfoldMemoryOperand() local
6452 Opc = getLoadRegOpcode(0, RC, isAligned, Subtarget); in unfoldMemoryOperand()
[all …]
H A DX86FrameLowering.cpp2260 assert(isAligned(MFI.getObjectAlign(FI), -(Offset + StackSize))); in getFrameIndexReference()
2268 assert(isAligned(MFI.getObjectAlign(FI), -(Offset + StackSize))); in getFrameIndexReference()
H A DX86ISelLowering.cpp2296 (!Subtarget.isUnalignedMem16Slow() || Op.isAligned(Align(16)))) { in getOptimalMemOpType()
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/Hexagon/
H A DHexagonISelDAGToDAG.cpp1356 if (!isAligned(Alignment, V)) in SelectAnyImmediate()
1377 !isAligned(Alignment, cast<BlockAddressSDNode>(N)->getOffset())) in SelectAnyImmediate()
1402 if (!isAligned(Alignment, Const->getZExtValue())) in SelectGlobalAddress()
H A DHexagonISelLowering.cpp3384 if (!isAligned(A, AM.BaseOffs)) in isLegalAddressingMode()
3489 if (Op.size() >= 8 && Op.isAligned(Align(8))) in getOptimalMemOpType()
3491 if (Op.size() >= 4 && Op.isAligned(Align(4))) in getOptimalMemOpType()
3493 if (Op.size() >= 2 && Op.isAligned(Align(2))) in getOptimalMemOpType()
/netbsd-src/external/apache2/llvm/dist/llvm/include/llvm/CodeGen/
H A DTargetLowering.h179 return isMemset() || llvm::isAligned(AlignCheck, SrcAlign.value()); in isSrcAligned()
182 return DstAlignCanChange || llvm::isAligned(AlignCheck, DstAlign.value()); in isDstAligned()
184 bool isAligned(Align AlignCheck) const { in isAligned() function
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/AMDGPU/
H A DAMDGPUCallLowering.cpp1177 assert(isAligned(ST.getStackAlignment(), FPDiff) && in lowerTailCall()
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Transforms/Scalar/
H A DDeadStoreElimination.cpp615 assert(isAligned(PrefAlign, ToRemoveSize) && in tryToShorten()
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/PowerPC/
H A DPPCRegisterInfo.cpp574 assert(isAligned(MaxAlign, maxCallFrameSize) && in lowerDynamicAlloc()
H A DPPCISelLowering.cpp2593 (!EncodingAlignment || isAligned(*EncodingAlignment, Imm))) in SelectAddressRegReg()
2603 (!EncodingAlignment || isAligned(*EncodingAlignment, Imm))) in SelectAddressRegReg()
2687 (!EncodingAlignment || isAligned(*EncodingAlignment, imm))) { in SelectAddressRegImm()
2711 (!EncodingAlignment || isAligned(*EncodingAlignment, imm))) { in SelectAddressRegImm()
2738 (!EncodingAlignment || isAligned(*EncodingAlignment, Imm))) { in SelectAddressRegImm()
2749 isAligned(*EncodingAlignment, CN->getZExtValue()))) { in SelectAddressRegImm()
16064 (Op.isAligned(Align(16)) || in getOptimalMemOpType()
17276 if (!Align || isAligned(*Align, Imm)) { in SelectOptimalAddrMode()
17307 if (isIntS16Immediate(CN, Imm) && (!Align || isAligned(*Align, Imm))) { in SelectOptimalAddrMode()
17315 (!Align || isAligned(*Align, CNImm))) { in SelectOptimalAddrMode()
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/ARM/
H A DARMConstantIslandPass.cpp549 assert(isAligned(Alignment, Size) && "CP Entry not multiple of 4 bytes!"); in doInitialConstPlacement()
H A DARMISelLowering.cpp17217 (Op.isAligned(Align(16)) || in getOptimalMemOpType()
17223 (Op.isAligned(Align(8)) || in getOptimalMemOpType()
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Transforms/Coroutines/
H A DCoroFrame.cpp720 if (!isAligned(F.TyAlignment, LayoutField.Offset)) in finish()
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/AArch64/
H A DAArch64ISelLowering.cpp11628 if (Op.isAligned(AlignCheck)) in getOptimalMemOpType()
11659 if (Op.isAligned(AlignCheck)) in getOptimalMemOpLLT()
/netbsd-src/external/apache2/llvm/dist/llvm/lib/CodeGen/SelectionDAG/
H A DDAGCombiner.cpp15711 isAligned(*Alignment, LD->getSrcValueOffset())) { in visitLOAD()
17833 isAligned(*Alignment, ST->getSrcValueOffset())) { in visitSTORE()