Home
last modified time | relevance | path

Searched refs:input_vol (Results 1 – 4 of 4) sorted by relevance

/netbsd-src/sys/external/bsd/drm2/dist/drm/amd/powerplay/
H A Damdgpu_vega20_ppt.c2609 int32_t input_index, input_clk, input_vol, i; in vega20_odn_edit_dpm_table() local
2729 input_vol = input[i + 2]; in vega20_odn_edit_dpm_table()
2749 if (input_vol < od8_settings->od8_settings_array[od8_id].min_value || in vega20_odn_edit_dpm_table()
2750 input_vol > od8_settings->od8_settings_array[od8_id].max_value) { in vega20_odn_edit_dpm_table()
2752 input_vol, in vega20_odn_edit_dpm_table()
2761 od_table->GfxclkVolt1 = input_vol * VOLTAGE_SCALE; in vega20_odn_edit_dpm_table()
2765 od_table->GfxclkVolt2 = input_vol * VOLTAGE_SCALE; in vega20_odn_edit_dpm_table()
2769 od_table->GfxclkVolt3 = input_vol * VOLTAGE_SCALE; in vega20_odn_edit_dpm_table()
/netbsd-src/sys/external/bsd/drm2/dist/drm/amd/powerplay/hwmgr/
H A Damdgpu_vega20_hwmgr.c2925 int32_t input_index, input_clk, input_vol, i; in vega20_odn_edit_dpm_table() local
3036 input_vol = input[i + 2]; in vega20_odn_edit_dpm_table()
3056 if (input_vol < od8_settings[od8_id].min_value || in vega20_odn_edit_dpm_table()
3057 input_vol > od8_settings[od8_id].max_value) { in vega20_odn_edit_dpm_table()
3059 input_vol, in vega20_odn_edit_dpm_table()
3068 od_table->GfxclkVolt1 = input_vol * VOLTAGE_SCALE; in vega20_odn_edit_dpm_table()
3072 od_table->GfxclkVolt2 = input_vol * VOLTAGE_SCALE; in vega20_odn_edit_dpm_table()
3076 od_table->GfxclkVolt3 = input_vol * VOLTAGE_SCALE; in vega20_odn_edit_dpm_table()
H A Damdgpu_smu7_hwmgr.c4867 uint32_t input_vol; in smu7_odn_edit_dpm_table() local
4908 input_vol = input[i+2]; in smu7_odn_edit_dpm_table()
4910 if (smu7_check_clk_voltage_valid(hwmgr, type, input_clk, input_vol)) { in smu7_odn_edit_dpm_table()
4913 podn_dpm_table_in_backend->entries[input_level].vddc = input_vol; in smu7_odn_edit_dpm_table()
4914 podn_vdd_dep_in_backend->entries[input_level].vddc = input_vol; in smu7_odn_edit_dpm_table()
4915 podn_vdd_dep_in_backend->entries[input_level].vddgfx = input_vol; in smu7_odn_edit_dpm_table()
H A Damdgpu_vega10_hwmgr.c5238 uint32_t input_vol; in vega10_odn_edit_dpm_table() local
5281 input_vol = input[i+2]; in vega10_odn_edit_dpm_table()
5283 if (vega10_check_clk_voltage_valid(hwmgr, type, input_clk, input_vol)) { in vega10_odn_edit_dpm_table()
5286 podn_vdd_dep_table->entries[input_level].vddc = input_vol; in vega10_odn_edit_dpm_table()