| /netbsd-src/sys/arch/aarch64/aarch64/ |
| H A D | disasm.c | 676 ValidBitMasks(uint64_t sf, uint64_t n, uint64_t imms, uint64_t immr) in ValidBitMasks() argument
683 len = fls64((n << 6) + (~imms & 0x3f)) - 1; in ValidBitMasks()
688 imms &= (esize - 1); in ValidBitMasks()
689 if (imms == (uint64_t)(esize - 1)) in ValidBitMasks()
696 DecodeBitMasks(uint64_t sf, uint64_t n, uint64_t imms, uint64_t immr) in DecodeBitMasks() argument
702 len = fls64((n << 6) + (~imms & 0x3f)) - 1; in DecodeBitMasks()
704 imms &= (esize - 1); in DecodeBitMasks()
706 result = rotate(esize, (1ULL << (imms + 1)) - 1, immr); in DecodeBitMasks()
717 MoveWidePreferred(uint64_t sf, uint64_t n, uint64_t imms, uint64_t immr) in MoveWidePreferred() argument
720 uint64_t x = DecodeBitMasks(sf, n, imms, immr); in MoveWidePreferred()
[all …]
|
| H A D | db_trace.c | 218 DecodeBitMasks(uint64_t sf, uint64_t n, uint64_t imms, uint64_t immr) in DecodeBitMasks() argument
224 len = fls64((n << 6) + (~imms & 0x3f)) - 1; in DecodeBitMasks()
226 imms &= (esize - 1); in DecodeBitMasks()
228 result = rotate(esize, (1ULL << (imms + 1)) - 1, immr); in DecodeBitMasks()
350 uint64_t imms = (insn >> 10) & 0x3f; variable
351 uint64_t v = DecodeBitMasks(1, n, imms, immr);
|
| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/AArch64/MCTargetDesc/ |
| H A D | AArch64AddressingModes.h | 297 unsigned imms = val & 0x3f; in decodeLogicalImmediate() local
300 int len = 31 - countLeadingZeros((N << 6) | (~imms & 0x3f)); in decodeLogicalImmediate()
304 unsigned S = imms & (size - 1); in decodeLogicalImmediate()
325 unsigned imms = val & 0x3f; in isValidDecodeLogicalImmediate() local
329 int len = 31 - countLeadingZeros((N << 6) | (~imms & 0x3f)); in isValidDecodeLogicalImmediate()
333 unsigned S = imms & (size - 1); in isValidDecodeLogicalImmediate()
|
| H A D | AArch64InstPrinter.cpp | 122 int64_t imms = Op3.getImm(); in printInst() local
123 if (Opcode == AArch64::UBFMWri && imms != 0x1F && ((imms + 1) == immr)) { in printInst()
125 shift = 31 - imms; in printInst()
126 } else if (Opcode == AArch64::UBFMXri && imms != 0x3f && in printInst()
127 ((imms + 1 == immr))) { in printInst()
129 shift = 63 - imms; in printInst()
130 } else if (Opcode == AArch64::UBFMWri && imms == 0x1f) { in printInst()
133 } else if (Opcode == AArch64::UBFMXri && imms == 0x3f) { in printInst()
136 } else if (Opcode == AArch64::SBFMWri && imms == 0x1f) { in printInst()
139 } else if (Opcode == AArch64::SBFMXri && imms == 0x3f) { in printInst()
|
| /netbsd-src/external/gpl3/binutils.old/dist/opcodes/ |
| H A D | aarch64-dis.c | 2497 int64_t imms, val; in convert_bfm_to_sr() local
2499 imms = inst->operands[3].imm.value; in convert_bfm_to_sr()
2501 if (imms == val) in convert_bfm_to_sr()
2533 int64_t immr, imms; in convert_bfm_to_bfx() local
2536 imms = inst->operands[3].imm.value; in convert_bfm_to_bfx()
2537 if (imms >= immr) in convert_bfm_to_bfx()
2541 inst->operands[3].imm.value = imms + 1 - lsb; in convert_bfm_to_bfx()
2560 int64_t immr, imms, val; in convert_bfm_to_bfi() local
2563 imms = inst->operands[3].imm.value; in convert_bfm_to_bfi()
2565 if (imms < immr) in convert_bfm_to_bfi()
[all …]
|
| /netbsd-src/external/gpl3/binutils/dist/opcodes/ |
| H A D | aarch64-dis.c | 2816 int64_t imms, val; in convert_bfm_to_sr() local
2818 imms = inst->operands[3].imm.value; in convert_bfm_to_sr()
2820 if (imms == val) in convert_bfm_to_sr()
2852 int64_t immr, imms; in convert_bfm_to_bfx() local
2855 imms = inst->operands[3].imm.value; in convert_bfm_to_bfx()
2856 if (imms >= immr) in convert_bfm_to_bfx()
2860 inst->operands[3].imm.value = imms + 1 - lsb; in convert_bfm_to_bfx()
2879 int64_t immr, imms, val; in convert_bfm_to_bfi() local
2882 imms = inst->operands[3].imm.value; in convert_bfm_to_bfi()
2884 if (imms < immr) in convert_bfm_to_bfi()
[all …]
|
| /netbsd-src/external/gpl3/binutils/dist/gas/config/ |
| H A D | tc-i386.c | 228 expressionS *imms; member
3356 pe (x->op[j].imms); in pi()
4356 i.op[i.operands].imms = exp; in process_immext()
4529 if (!i.op[0].imms) in optimize_encoding()
4531 i.op[0].imms = &im_expressions[0]; in optimize_encoding()
4532 i.op[0].imms->X_op = O_absent; in optimize_encoding()
4588 && i.op[0].imms->X_op == O_constant in optimize_encoding()
4589 && fits_in_imm7 (i.op[0].imms->X_add_number)) in optimize_encoding()
4625 && i.op[0].imms->X_op == O_constant in optimize_encoding()
4628 && fits_in_unsigned_long (i.op[0].imms->X_add_number)) in optimize_encoding()
[all …]
|
| H A D | tc-i386-intel.c | 951 i.op[this_operand].imms = expP; in i386_intel_operand()
1046 if (i386_finalize_immediate (exp_seg, i.op[0].imms, in i386_intel_operand()
1052 i.op[this_operand].imms = expP; in i386_intel_operand()
1196 i.op[this_operand].imms = expP; in i386_intel_operand()
|
| /netbsd-src/external/gpl3/binutils.old/dist/gas/config/ |
| H A D | tc-i386-intel.c | 853 i.op[this_operand].imms = expP; in i386_intel_operand()
946 if (i386_finalize_immediate (exp_seg, i.op[0].imms, in i386_intel_operand()
952 i.op[this_operand].imms = expP; in i386_intel_operand()
1102 i.op[this_operand].imms = expP; in i386_intel_operand()
|
| H A D | tc-i386.c | 223 expressionS *imms; member
3147 pe (x->op[j].imms); in pi()
3978 i.op[i.operands].imms = exp; in process_immext()
4152 if (!i.op[0].imms) in optimize_encoding()
4154 i.op[0].imms = &im_expressions[0]; in optimize_encoding()
4155 i.op[0].imms->X_op = O_absent; in optimize_encoding()
4211 && i.op[0].imms->X_op == O_constant in optimize_encoding()
4212 && fits_in_imm7 (i.op[0].imms->X_add_number) in optimize_encoding()
4243 && i.op[0].imms->X_op == O_constant in optimize_encoding()
4246 && fits_in_unsigned_long (i.op[0].imms->X_add_number)) in optimize_encoding()
[all …]
|
| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/ARM/ |
| H A D | ARM.td | 404 "32-bit imms">;
|
| H A D | ARMInstrThumb.td | 1709 // Two piece imms.
|
| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/AArch64/ |
| H A D | AArch64InstrFormats.td | 2732 : I<(outs regtype:$Rd), (ins regtype:$Rn, imm_type:$immr, imm_type:$imms),
2733 asm, "\t$Rd, $Rn, $immr, $imms", "", []>,
2738 bits<6> imms;
2743 let Inst{15-10} = imms;
2752 // imms<5> and immr<5> must be zero, else ReservedValue().
2766 imm_type:$imms),
2767 asm, "\t$Rd, $Rn, $immr, $imms", "$src = $Rd", []>,
2772 bits<6> imms;
2777 let Inst{15-10} = imms;
2786 // imms<5> and immr<5> must be zero, else ReservedValue().
|
| H A D | SVEInstrFormats.td | 1568 : I<(outs ZPR64:$Zd), (ins logical_imm64:$imms),
1569 asm, "\t$Zd, $imms",
1573 bits<13> imms;
1575 let Inst{17-5} = imms;
|
| H A D | AArch64SchedA64FX.td | 2562 // [90] "dupm $Zd, $imms";
|
| /netbsd-src/external/gpl3/gcc.old/dist/gcc/config/mcore/ |
| H A D | mcore.md | 163 ;; ; experimenting to see which does better (i.e. regular imms vs.
164 ;; ; arbitrary imms) for a particular code. BRC
|
| /netbsd-src/external/gpl3/gcc/dist/gcc/config/mcore/ |
| H A D | mcore.md | 163 ;; ; experimenting to see which does better (i.e. regular imms vs.
164 ;; ; arbitrary imms) for a particular code. BRC
|
| /netbsd-src/external/gpl3/binutils.old/dist/gas/ |
| H A D | ChangeLog-0001 | 7252 (struct _i386_insn): Delete disps[], imms[], regs[]. Add op[].
7253 Throughout file replace occurences of disps[n], imms[n], regs[n]
7254 with equivalent op[n].disps, op[n].imms, op[n].regs. Simplify
|
| H A D | ChangeLog | 996 imms one.
|
| /netbsd-src/external/gpl3/binutils/dist/gas/ |
| H A D | ChangeLog-0001 | 7252 (struct _i386_insn): Delete disps[], imms[], regs[]. Add op[].
7253 Throughout file replace occurences of disps[n], imms[n], regs[n]
7254 with equivalent op[n].disps, op[n].imms, op[n].regs. Simplify
|
| H A D | ChangeLog | 1691 imms one.
|