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Searched refs:hasV8Ops (Results 1 – 4 of 4) sorted by relevance

/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/ARM/
H A DARMPredicates.td64 def HasV8 : Predicate<"Subtarget->hasV8Ops()">,
66 def PreV8 : Predicate<"!Subtarget->hasV8Ops()">,
H A DARMSubtarget.cpp240 RestrictIT = hasV8Ops() && !hasMinSize(); in initSubtargetFeatures()
H A DARMSubtarget.h613 bool hasV8Ops() const { return HasV8Ops; } in hasV8Ops() function
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/ARM/AsmParser/
H A DARMAsmParser.cpp545 bool hasV8Ops() const { in hasV8Ops() function in __anonad70014b0111::ARMAsmParser
4965 if (!hasV8Ops() && (Opt == ARM_MB::ISHLD || Opt == ARM_MB::OSHLD || in parseMemBarrierOptOperand()
6966 (PairedReg == ARM::SP && !hasV8Ops())) in fixupGNULDRDAlias()
7722 if (RmReg == ARM::SP && !hasV8Ops()) in validateInstruction()
10735 if (Opc == ARM::t2MOVr && !hasV8Ops()) in checkTargetMatchPredicate()
10765 (isThumb() && !hasV8Ops())) in checkTargetMatchPredicate()
10771 if (!hasV8Ops() && (Inst.getOperand(0).getReg() == ARM::SP)) in checkTargetMatchPredicate()
10795 if ((Reg == ARM::SP) && !hasV8Ops()) in checkTargetMatchPredicate()
10961 if (wasInITBlock && hasV8Ops() && isThumb() && in MatchAndEmitInstruction()
12038 return hasV8Ops() ? "operand must be a register in range [r0, r14]" in getCustomOperandDiag()
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