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Searched refs:getSubRegIndexLaneMask (Results 1 – 25 of 27) sorted by relevance

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/netbsd-src/external/apache2/llvm/dist/llvm/lib/CodeGen/
H A DDetectDeadLanes.cpp254 MO1UsedLanes = UsedLanes & ~TRI->getSubRegIndexLaneMask(SubIdx); in transferUsedLanes()
315 DefinedLanes &= TRI->getSubRegIndexLaneMask(SubIdx); in transferDefinedLanes()
322 DefinedLanes &= TRI->getSubRegIndexLaneMask(SubIdx); in transferDefinedLanes()
326 DefinedLanes &= ~TRI->getSubRegIndexLaneMask(SubIdx); in transferDefinedLanes()
450 UsedLanes |= TRI->getSubRegIndexLaneMask(SubReg); in determineInitialUsedLanes()
458 LaneBitmask Mask = TRI->getSubRegIndexLaneMask(SubReg); in isUndefRegAtInput()
H A DLiveIntervalCalc.cpp70 LaneBitmask SubMask = SubReg != 0 ? TRI.getSubRegIndexLaneMask(SubReg) in calculate()
170 LaneBitmask SLM = TRI.getSubRegIndexLaneMask(SubReg); in extendToUses()
H A DTargetRegisterInfo.cpp534 LaneBitmask SubRegMask = getSubRegIndexLaneMask(Idx); in getCoveringSubRegIndexes()
561 LaneBitmask LanesLeft = LaneMask & ~getSubRegIndexLaneMask(BestIdx); in getCoveringSubRegIndexes()
566 LaneBitmask SubRegMask = getSubRegIndexLaneMask(Idx); in getCoveringSubRegIndexes()
588 LanesLeft &= ~getSubRegIndexLaneMask(BestIdx); in getCoveringSubRegIndexes()
H A DRegisterCoalescer.cpp1466 LaneBitmask DstMask = TRI->getSubRegIndexLaneMask(NewIdx); in reMaterializeTrivialDef()
1601 LaneBitmask SrcMask = TRI->getSubRegIndexLaneMask(SrcSubIdx); in eliminateUndefCopy()
1640 LaneBitmask DstMask = TRI->getSubRegIndexLaneMask(DstSubIdx); in eliminateUndefCopy()
1659 LaneBitmask UseMask = TRI->getSubRegIndexLaneMask(MO.getSubReg()); in eliminateUndefCopy()
1694 LaneBitmask Mask = TRI->getSubRegIndexLaneMask(SubRegIdx); in addUndefFlag()
1777 LaneBitmask UsedLanes = TRI->getSubRegIndexLaneMask(SubIdx); in updateRegDefsUses()
1851 LaneBitmask SubRegMask = TRI->getSubRegIndexLaneMask(SubRegIdx); in setUndefOnPrunedSubRegUses()
2542 L |= TRI->getSubRegIndexLaneMask( in computeWriteLanes()
2642 : TRI->getSubRegIndexLaneMask(SubIdx); in analyzeValue()
2840 if ((TRI->getSubRegIndexLaneMask(Other.SubIdx) & ~V.WriteLanes).none()) in analyzeValue()
[all …]
H A DRenameIndependentSubregs.cpp183 LaneBitmask LaneMask = TRI.getSubRegIndexLaneMask(SubRegIdx); in findComponents()
227 LaneBitmask LaneMask = TRI.getSubRegIndexLaneMask(SubRegIdx); in rewriteOperands()
H A DLiveIntervals.cpp579 LaneBitmask LaneMask = TRI->getSubRegIndexLaneMask(SubReg); in shrinkToUses()
792 LaneBitmask UseMask = SubReg ? TRI->getSubRegIndexLaneMask(SubReg) in addKillFlags()
1032 LaneBitmask LaneMask = SubReg ? TRI.getSubRegIndexLaneMask(SubReg) in updateAllRanges()
1460 && (TRI.getSubRegIndexLaneMask(SubReg) & LaneMask).none()) in findLastUseBefore()
1599 LaneBitmask Mask = TRI->getSubRegIndexLaneMask(SubReg); in repairOldRegInRange()
H A DLivePhysRegs.cpp165 if ((Mask & TRI->getSubRegIndexLaneMask(SI)).any()) in addBlockLiveIns()
H A DLiveRangeEdit.cpp252 LaneBitmask LaneMask = TRI.getSubRegIndexLaneMask(SubReg); in useIsKill()
H A DRDFRegisters.cpp187 LaneBitmask SM = TRI.getSubRegIndexLaneMask(SI.getSubRegIndex()); in aliasRM()
H A DSplitKit.cpp454 LM |= TRI.getSubRegIndexLaneMask(SR); in addDeadDef()
539 LaneBitmask LaneMask = TRI.getSubRegIndexLaneMask(SubIdx); in buildSingleSubRegCopy()
1382 LaneBitmask LM = Sub != 0 ? TRI.getSubRegIndexLaneMask(Sub) in rewriteAssigned()
H A DLiveInterval.cpp909 LaneBitmask OrigMask = TRI.getSubRegIndexLaneMask(MOI->getSubReg()); in stripValuesNotDefiningMask()
989 LaneBitmask DefMask = TRI.getSubRegIndexLaneMask(SubReg); in computeSubRangeUndefs()
H A DVirtRegMap.cpp382 LaneBitmask UseMask = TRI->getSubRegIndexLaneMask(SubRegIdx); in readsUndefSubreg()
H A DRegisterPressure.cpp557 ? TRI.getSubRegIndexLaneMask(SubRegIdx) in pushRegLanes()
1236 LaneBitmask UseMask = TRI.getSubRegIndexLaneMask(SubRegIdx); in findUseBetween()
H A DPeepholeOptimizer.cpp1968 !(TRI->getSubRegIndexLaneMask(DefSubReg) & in getNextSourceFromInsertSubreg()
1969 TRI->getSubRegIndexLaneMask(InsertedReg.SubIdx)).none()) in getNextSourceFromInsertSubreg()
H A DMachineVerifier.cpp2199 ? TRI->getSubRegIndexLaneMask(SubRegIdx) in checkLiveness()
2297 ? TRI->getSubRegIndexLaneMask(SubRegIdx) in checkLiveness()
2790 (TRI->getSubRegIndexLaneMask(MOI->getSubReg()) & LaneMask).none()) in verifyLiveRangeValue()
2922 LaneBitmask SLM = Sub != 0 ? TRI->getSubRegIndexLaneMask(Sub) in verifyLiveRangeSegment()
H A DRDFLiveness.cpp921 LaneBitmask M = TRI.getSubRegIndexLaneMask(S.getSubRegIndex()); in resetKills()
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/AMDGPU/
H A DSIFormMemoryClauses.cpp178 LaneBitmask Mask = TRI->getSubRegIndexLaneMask(MO.getSubReg()); in canBundle()
228 ? TRI->getSubRegIndexLaneMask(MO.getSubReg()) in collectRegUses()
H A DGCNRegPressure.cpp196 MRI.getTargetRegisterInfo()->getSubRegIndexLaneMask(MO.getSubReg()); in getDefRegMask()
205 return MRI.getTargetRegisterInfo()->getSubRegIndexLaneMask(SubReg); in getUsedRegMask()
H A DSIRegisterInfo.h325 return getNumCoveredRegs(getSubRegIndexLaneMask(SubReg)); in getNumChannelsFromSubReg()
H A DSIRegisterInfo.cpp277 assert(getSubRegIndexLaneMask(AMDGPU::sub0).getAsInteger() == 3 && in SIRegisterInfo()
278 getSubRegIndexLaneMask(AMDGPU::sub31).getAsInteger() == (3ULL << 62) && in SIRegisterInfo()
279 (getSubRegIndexLaneMask(AMDGPU::lo16) | in SIRegisterInfo()
280 getSubRegIndexLaneMask(AMDGPU::hi16)).getAsInteger() == in SIRegisterInfo()
281 getSubRegIndexLaneMask(AMDGPU::sub0).getAsInteger() && in SIRegisterInfo()
2394 LaneBitmask SubLanes = SubReg ? getSubRegIndexLaneMask(SubReg) in findReachingDef()
H A DSIShrinkInstructions.cpp399 LaneBitmask Overlap = TRI.getSubRegIndexLaneMask(SubReg) & in instAccessReg()
400 TRI.getSubRegIndexLaneMask(MO.getSubReg()); in instAccessReg()
H A DSIWholeQuadMode.cpp328 SubReg ? TRI->getSubRegIndexLaneMask(SubReg) in markDefs()
391 : TRI->getSubRegIndexLaneMask(Op.getSubReg()); in markDefs()
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/Hexagon/
H A DRDFCopy.cpp127 if (RR.Mask == TRI.getSubRegIndexLaneMask(S.getSubRegIndex())) in run()
H A DHexagonBlockRanges.cpp246 if ((I.LaneMask & TRI.getSubRegIndexLaneMask(SI)).any()) in getLiveIns()
/netbsd-src/external/apache2/llvm/dist/llvm/include/llvm/CodeGen/
H A DTargetRegisterInfo.h375 LaneBitmask getSubRegIndexLaneMask(unsigned SubIdx) const { in getSubRegIndexLaneMask() function

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