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Searched refs:getStoreSize (Results 1 – 25 of 45) sorted by relevance

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/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/X86/
H A DX86InstrFragmentsSIMD.td831 return St->getAlignment() >= St->getMemoryVT().getStoreSize();
837 return Ld->getAlignment() >= Ld->getMemoryVT().getStoreSize();
893 Ld->getAlignment() >= Ld->getMemoryVT().getStoreSize();
931 return cast<MemIntrinsicSDNode>(N)->getMemoryVT().getStoreSize() == 4;
936 return cast<MemIntrinsicSDNode>(N)->getMemoryVT().getStoreSize() == 8;
941 return cast<MemIntrinsicSDNode>(N)->getMemoryVT().getStoreSize() == 8;
946 return cast<MemIntrinsicSDNode>(N)->getMemoryVT().getStoreSize() == 1;
951 return cast<MemIntrinsicSDNode>(N)->getMemoryVT().getStoreSize() == 2;
956 return cast<MemIntrinsicSDNode>(N)->getMemoryVT().getStoreSize() == 4;
961 return cast<MemIntrinsicSDNode>(N)->getMemoryVT().getStoreSize() == 8;
[all …]
H A DX86CallLowering.cpp120 VA.getLocVT().getStoreSize(), in assignValueToAddress()
/netbsd-src/external/apache2/llvm/dist/llvm/include/llvm/CodeGen/
H A DValueTypes.h355 TypeSize getStoreSize() const { in getStoreSize() function
367 return getStoreSize() * 8; in getStoreSizeInBits()
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/AArch64/GISel/
H A DAArch64CallLowering.cpp71 return (ValVT == MVT::i8 || ValVT == MVT::i16) ? ValVT.getStoreSize() in getStackValueStoreSizeHack()
72 : VA.getLocVT().getStoreSize(); in getStackValueStoreSizeHack()
303 MemSize = VA.getValVT().getStoreSize(); in assignValueToAddress()
313 MemSize = VA.getValVT().getStoreSize(); in assignValueToAddress()
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/SystemZ/
H A DSystemZCallingConv.h43 return ArgVT.isVector() && ArgVT.getStoreSize() <= 8; in IsShortVectorType()
H A DSystemZISelDAGToDAG.cpp1429 uint64_t Size = Load->getMemoryVT().getStoreSize(); in canUseBlockOperation()
1445 uint64_t Size = Load->getMemoryVT().getStoreSize(); in storeLoadCanUseMVC()
1470 TypeSize StoreSize = MemAccess->getMemoryVT().getStoreSize(); in storeLoadIsAligned()
H A DSystemZISelLowering.cpp1616 assert((PartOffset + PartValue.getValueType().getStoreSize() <= in LowerCall()
1617 SlotVT.getStoreSize()) && "Not enough space for argument part!"); in LowerCall()
4392 unsigned BytesPerElement = VT.getVectorElementType().getStoreSize(); in getVPermMask()
4617 unsigned BytesPerElement = VT.getVectorElementType().getStoreSize(); in addUndef()
4629 unsigned BytesPerElement = VT.getVectorElementType().getStoreSize(); in add()
4635 unsigned FromBytesPerElement = FromVT.getVectorElementType().getStoreSize(); in add()
5731 unsigned BytesPerElement = VecVT.getVectorElementType().getStoreSize(); in combineExtract()
5766 unsigned OpBytesPerElement = OpVT.getVectorElementType().getStoreSize(); in combineExtract()
5796 unsigned ExtBytesPerElement = ExtVT.getVectorElementType().getStoreSize(); in combineExtract()
5797 unsigned OpBytesPerElement = OpVT.getVectorElementType().getStoreSize(); in combineExtract()
[all …]
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/AVR/
H A DAVRISelLowering.cpp1027 unsigned TotalBytes = VT.getStoreSize(); in analyzeArguments()
1032 TotalBytes += Args[j].VT.getStoreSize(); in analyzeArguments()
1069 RegIdx -= VT.getStoreSize(); in analyzeArguments()
1081 TotalBytes += Arg.VT.getStoreSize(); in getTotalArgumentsSizeInBytes()
1120 RegIdx -= VT.getStoreSize(); in analyzeReturnValues()
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/ARC/
H A DARCISelLowering.cpp501 unsigned ObjSize = VA.getLocVT().getStoreSize(); in LowerCallArguments()
642 unsigned ObjSize = VA.getLocVT().getStoreSize(); in LowerReturn()
/netbsd-src/external/apache2/llvm/dist/llvm/include/llvm/Support/
H A DMachineValueType.h1024 TypeSize getStoreSize() const { in getStoreSize() function
1036 return getStoreSize() * 8; in getStoreSizeInBits()
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/PowerPC/
H A DPPCTargetTransformInfo.cpp1145 unsigned SrcBytes = LT.second.getStoreSize(); in getMemoryOpCost()
1157 *Alignment >= LT.second.getScalarType().getStoreSize()) in getMemoryOpCost()
H A DPPCISelLowering.cpp3816 unsigned ArgSize = ArgVT.getStoreSize(); in CalculateStackSlotSize()
3860 Alignment = Align(OrigVT.getStoreSize()); in CalculateStackSlotAlignment()
3862 Alignment = Align(ArgVT.getStoreSize()); in CalculateStackSlotAlignment()
4071 unsigned ArgSize = VA.getLocVT().getStoreSize(); in LowerFormalArguments_32SVR4()
4073 unsigned ObjSize = VA.getValVT().getStoreSize(); in LowerFormalArguments_32SVR4()
4276 unsigned ObjSize = ObjectVT.getStoreSize(); in LowerFormalArguments_64SVR4()
6597 const unsigned StoreSize = LocVT.getStoreSize(); in CC_AIX()
6891 const unsigned LocSize = LocVT.getStoreSize(); in LowerFormalArguments_AIX()
6892 const unsigned ValSize = ValVT.getStoreSize(); in LowerFormalArguments_AIX()
7363 if (Arg.getValueType().getStoreSize() == LocVT.getStoreSize()) in LowerCall_AIX()
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/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/ARM/
H A DARMCallLowering.cpp131 MPO, MachineMemOperand::MOStore, VA.getLocVT().getStoreSize(), in assignValueToAddress()
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/AMDGPU/
H A DAMDGPUISelLowering.cpp1119 PartOffset += MemVT.getStoreSize(); in analyzeFormalArgumentsCompute()
1546 unsigned Size = LoMemVT.getStoreSize(); in SplitVectorLoad()
1556 HiPtr, SrcValue.getWithOffset(LoMemVT.getStoreSize()), in SplitVectorLoad()
1636 SDValue HiPtr = DAG.getObjectPtrOffset(SL, BasePtr, LoMemVT.getStoreSize()); in SplitVectorStore()
1640 unsigned Size = LoMemVT.getStoreSize(); in SplitVectorStore()
2853 unsigned Size = VT.getStoreSize(); in shouldCombineMemoryType()
2879 unsigned Size = VT.getStoreSize(); in performLoadCombine()
2930 unsigned Size = VT.getStoreSize(); in performStoreCombine()
4142 int FI = getOrCreateFixedStackObject(MFI, VT.getStoreSize(), Offset); in loadStackInputValue()
H A DSIISelLowering.cpp1513 VT.getStoreSize() > 16)) { in allowsMisalignedMemoryAccesses()
1679 if (MemVT.getStoreSize() < 4 && Alignment < 4) { in lowerKernargMemParameter()
1726 unsigned ArgSize = VA.getValVT().getStoreSize(); in lowerStackParameter()
2756 CCInfo.AllocateStack(ArgVT.getStoreSize(), Align(4)); in passSpecialInputs()
3103 Flags.getByValSize() : VA.getValVT().getStoreSize(); in LowerCall()
6320 VT.getStoreSize(), Alignment); in lowerSBuffer()
6335 MF.getMachineMemOperand(MMO, 0, WidenedVT.getStoreSize())); in lowerSBuffer()
8079 Alignment < MemVT.getStoreSize() && MemVT.getSizeInBits() > 32) { in LowerLOAD()
8164 ((Subtarget->useDS128() && MemVT.getStoreSize() == 16) || in LowerLOAD()
8165 MemVT.getStoreSize() == 12) && in LowerLOAD()
[all …]
H A DR600ISelLowering.cpp1174 if (Alignment < MemVT.getStoreSize() && in LowerSTORE()
1301 assert(Load->getAlignment() >= MemVT.getStoreSize()); in lowerPrivateExtLoad()
1543 unsigned Alignment = MinAlign(VT.getStoreSize(), PartOffset); in LowerFormalArguments()
/netbsd-src/external/apache2/llvm/dist/llvm/lib/CodeGen/SelectionDAG/
H A DLegalizeVectorTypes.cpp1307 DAG.CreateStackTemporary(VecVT.getStoreSize(), SmallestAlign); in SplitVecRes_INSERT_SUBVECTOR()
1608 DAG.CreateStackTemporary(VecVT.getStoreSize(), SmallestAlign); in SplitVecRes_INSERT_VECTOR_ELT()
1767 unsigned LoSize = MemoryLocation::getSizeOrUnknown(LoMemVT.getStoreSize()); in SplitVecRes_MLOAD()
1784 unsigned HiSize = MemoryLocation::getSizeOrUnknown(HiMemVT.getStoreSize()); in SplitVecRes_MLOAD()
1791 LoMemVT.getStoreSize().getFixedSize()); in SplitVecRes_MLOAD()
2472 DAG.CreateStackTemporary(VecVT.getStoreSize(), SmallestAlign); in SplitVecOp_EXTRACT_VECTOR_ELT()
2609 unsigned LoSize = MemoryLocation::getSizeOrUnknown(LoMemVT.getStoreSize()); in SplitVecOp_MSTORE()
2634 LoMemVT.getStoreSize().getFixedSize()); in SplitVecOp_MSTORE()
2636 unsigned HiSize = MemoryLocation::getSizeOrUnknown(HiMemVT.getStoreSize()); in SplitVecOp_MSTORE()
H A DLegalizeTypesGeneric.cpp165 SDValue StackPtr = DAG.CreateStackTemporary(InVT.getStoreSize(), Align); in ExpandRes_BITCAST()
H A DLegalizeTypes.cpp898 DAG.CreateStackTemporary(Op.getValueType().getStoreSize(), Align); in CreateStackStoreLoad()
H A DStatepointLowering.cpp111 unsigned SpillSize = ValueType.getStoreSize(); in allocateStackSlot()
H A DSelectionDAGBuilder.cpp4330 VT.getStoreSize().getKnownMinSize(), *Alignment, AAInfo); in visitMaskedStore()
4507 VT.getStoreSize().getKnownMinSize(), *Alignment, AAInfo, Ranges); in visitMaskedLoad()
4587 MachinePointerInfo(I.getPointerOperand()), Flags, MemVT.getStoreSize(), in visitAtomicCmpXchg()
4633 MachinePointerInfo(I.getPointerOperand()), Flags, MemVT.getStoreSize(), in visitAtomicRMW()
4677 MachinePointerInfo(I.getPointerOperand()), Flags, MemVT.getStoreSize(), in visitAtomicLoad()
4730 MachinePointerInfo(I.getPointerOperand()), Flags, MemVT.getStoreSize(), in visitAtomicStore()
9623 j*Parts[j].getValueType().getStoreSize().getKnownMinSize()); in LowerCallTo()
10149 ArgNo, PartBase+i*RegisterVT.getStoreSize().getKnownMinSize()); in LowerArguments()
10162 PartBase += VT.getStoreSize().getKnownMinSize(); in LowerArguments()
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/RISCV/
H A DRISCVISelDAGToDAG.cpp1149 if (MemVT.getStoreSize() != VT.getVectorElementType().getStoreSize()) in Select()
/netbsd-src/external/apache2/llvm/dist/llvm/include/llvm/Target/
H A DTargetSelectionDAG.td1291 return St->getAlignment() >= St->getMemoryVT().getStoreSize();
1297 return St->getAlignment() < St->getMemoryVT().getStoreSize();
1309 return Ld->getAlignment() >= Ld->getMemoryVT().getStoreSize();
/netbsd-src/external/apache2/llvm/dist/llvm/lib/CodeGen/GlobalISel/
H A DCallLowering.cpp1023 return ValVT.getStoreSize(); in getStackValueStoreSize()
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/Hexagon/
H A DHexagonISelDAGToDAG.cpp1580 return N->getAlignment() >= N->getMemoryVT().getStoreSize(); in isAlignedMemNode()
1585 switch (N->getMemoryVT().getStoreSize()) { in isSmallStackStore()

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