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Searched refs:getRelaxedOpcode (Results 1 – 6 of 6) sorted by relevance

/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/M68k/MCTargetDesc/
H A DM68kAsmBackend.cpp141 static unsigned getRelaxedOpcode(const MCInst &Inst) { in getRelaxedOpcode() function
190 unsigned RelaxedOp = getRelaxedOpcode(Inst); in relaxInstruction()
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/ARM/MCTargetDesc/
H A DARMAsmBackend.h57 unsigned getRelaxedOpcode(unsigned Op, const MCSubtargetInfo &STI) const;
H A DARMAsmBackend.cpp207 unsigned ARMAsmBackend::getRelaxedOpcode(unsigned Op, in getRelaxedOpcode() function in ARMAsmBackend
232 if (getRelaxedOpcode(Inst.getOpcode(), STI) != Inst.getOpcode()) in mayNeedRelaxation()
331 unsigned RelaxedOp = getRelaxedOpcode(Inst.getOpcode(), STI); in relaxInstruction()
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/RISCV/MCTargetDesc/
H A DRISCVAsmBackend.h106 unsigned getRelaxedOpcode(unsigned Op) const;
H A DRISCVAsmBackend.cpp184 unsigned RISCVAsmBackend::getRelaxedOpcode(unsigned Op) const { in getRelaxedOpcode() function in RISCVAsmBackend
200 return getRelaxedOpcode(Inst.getOpcode()) != Inst.getOpcode(); in mayNeedRelaxation()
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/X86/MCTargetDesc/
H A DX86AsmBackend.cpp313 static unsigned getRelaxedOpcode(const MCInst &Inst, bool Is16BitMode) { in getRelaxedOpcode() function
843 unsigned RelaxedOp = getRelaxedOpcode(Inst, Is16BitMode); in relaxInstruction()
862 return getRelaxedOpcode(Inst, Is16BitMode) == Inst.getOpcode(); in isFullyRelaxed()