| /netbsd-src/external/apache2/llvm/dist/llvm/tools/llvm-exegesis/lib/ |
| H A D | RegisterAliasing.cpp | 16 BitVector AliasedBits(RegInfo.getNumRegs()); in getAliasedBits()
28 : SourceBits(RegInfo.getNumRegs()), AliasedBits(RegInfo.getNumRegs()), in RegisterAliasingTracker()
29 Origins(RegInfo.getNumRegs()) {} in RegisterAliasingTracker()
63 EmptyRegisters(RegInfo.getNumRegs()) {} in RegisterAliasingTrackerCache()
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| H A D | BenchmarkResult.cpp | 52 StringMap<unsigned> Map(RegInfo.getNumRegs()); in generateRegNameToRegNoMapping()
55 for (unsigned I = 1, E = RegInfo.getNumRegs(); I < E; ++I) in generateRegNameToRegNoMapping()
57 assert(Map.size() == RegInfo.getNumRegs() && "Size prediction failed"); in generateRegNameToRegNoMapping()
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| /netbsd-src/external/apache2/llvm/dist/llvm/include/llvm/CodeGen/ |
| H A D | LivePhysRegs.h | 59 LiveRegs.setUniverse(TRI.getNumRegs()); in LivePhysRegs()
69 LiveRegs.setUniverse(TRI.getNumRegs()); in init()
81 assert(Reg <= TRI->getNumRegs() && "Expected a physical register."); in addReg()
91 assert(Reg <= TRI->getNumRegs() && "Expected a physical register."); in removeReg()
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| H A D | TargetRegisterInfo.h | 77 unsigned getNumRegs() const { return MC->getNumRegs(); } in getNumRegs() function
198 return OrderFunc ? OrderFunc(MF) : makeArrayRef(begin(), getNumRegs()); in getRawAllocationOrder()
352 unsigned NumRegs = getNumRegs(); in getRegisterCosts()
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/M68k/ |
| H A D | M68kRegisterInfo.cpp | 97 (BestRC->hasSubClass(RC) && RC->getNumRegs() > BestRC->getNumRegs()))) in getMaximalPhysRegClass()
107 for (unsigned i = 0; i < TRC.getNumRegs(); ++i) { in getRegisterOrder()
124 BitVector Reserved(getNumRegs()); in getReservedRegs()
137 for (size_t Reg = 0, Total = getNumRegs(); Reg != Total; ++Reg) { in getReservedRegs()
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/CodeGen/ |
| H A D | CriticalAntiDepBreaker.cpp | 46 Classes(TRI->getNumRegs(), nullptr), KillIndices(TRI->getNumRegs(), 0), in CriticalAntiDepBreaker()
47 DefIndices(TRI->getNumRegs(), 0), KeepRegs(TRI->getNumRegs(), false) {} in CriticalAntiDepBreaker()
53 for (unsigned i = 0, e = TRI->getNumRegs(); i != e; ++i) { in StartBlock()
115 for (unsigned Reg = 0; Reg != TRI->getNumRegs(); ++Reg) { in Observe()
268 for (unsigned i = 0, e = TRI->getNumRegs(); i != e; ++i) { in ScanInstruction()
471 for (unsigned Reg = 0; Reg < TRI->getNumRegs(); ++Reg) { in BreakAntiDependencies()
525 std::vector<unsigned> LastNewReg(TRI->getNumRegs(), 0); in BreakAntiDependencies()
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| H A D | RegUsageInfoCollector.cpp | 128 unsigned RegMaskSize = MachineOperand::getRegMaskSize(TRI->getNumRegs()); in runOnMachineFunction()
155 for (unsigned PReg = 1, PRegE = TRI->getNumRegs(); PReg < PRegE; ++PReg) { in runOnMachineFunction()
182 for (unsigned PReg = 1, PRegE = TRI->getNumRegs(); PReg < PRegE; ++PReg) { in runOnMachineFunction()
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| H A D | RDFRegisters.cpp | 30 RegInfos.resize(TRI.getNumRegs()); in PhysicalRegisterInfo()
32 BitVector BadRC(TRI.getNumRegs()); in PhysicalRegisterInfo()
87 for (unsigned I = 1, E = TRI.getNumRegs(); I != E; ++I) { in PhysicalRegisterInfo()
98 BitVector AS(TRI.getNumRegs()); in PhysicalRegisterInfo()
113 for (unsigned i = 1, e = TRI.getNumRegs(); i != e; ++i) { in getAliasSet()
204 unsigned NumRegs = TRI.getNumRegs(); in aliasMM()
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| H A D | RegisterClassInfo.cpp | 62 CalleeSavedAliases.assign(TRI->getNumRegs(), 0); in runOnMachineFunction()
98 unsigned NumRegs = RC->getNumRegs(); in compute()
201 unsigned NReserved = RC->getNumRegs() - NAllocatableRegs; in computePSetLimit()
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| H A D | TargetFrameLoweringImpl.cpp | 68 CalleeSaves.resize(TRI.getNumRegs()); in getCalleeSaves()
86 SavedRegs.resize(TRI.getNumRegs()); in determineCalleeSaves()
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| H A D | MachineRegisterInfo.cpp | 48 unsigned NumRegs = getTargetRegisterInfo()->getNumRegs(); in MachineRegisterInfo()
78 if (NewRC->getNumRegs() < MinNumRegs) in constrainRegClass()
259 for (unsigned i = 1, e = getTargetRegisterInfo()->getNumRegs(); i != e; ++i) in verifyUseLists()
509 assert(ReservedRegs.size() == getTargetRegisterInfo()->getNumRegs() && in freezeReservedRegs()
600 assert(Reg && (Reg < TRI->getNumRegs()) && in disableCalleeSavedRegister()
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| H A D | TargetRegisterInfo.cpp | 88 BitVector Checked(getNumRegs()); in checkAllSuperRegsMarked()
126 else if (Reg < TRI->getNumRegs()) { in printReg()
257 BitVector Allocatable(getNumRegs()); in getAllocatableSet()
493 unsigned N = (getNumRegs()+31) / 32; in regmaskSubsetEqual()
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| H A D | ExecutionDomainFix.cpp | 420 assert(NumRegs == RC->getNumRegs() && "Bad regclass"); in runOnMachineFunction()
444 AliasMap.resize(TRI->getNumRegs()); in runOnMachineFunction()
445 for (unsigned i = 0, e = RC->getNumRegs(); i != e; ++i) in runOnMachineFunction()
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| H A D | AggressiveAntiDepBreaker.cpp | 149 State = new AggressiveAntiDepState(TRI->getNumRegs(), BB); in StartBlock()
204 for (unsigned Reg = 0; Reg != TRI->getNumRegs(); ++Reg) { in Observe()
518 BitVector BV(TRI->getNumRegs(), false); in GetRenameRegisters()
792 for (unsigned Reg = 0; Reg < TRI->getNumRegs(); ++Reg) { in BreakAntiDependencies()
799 BitVector RegAliases(TRI->getNumRegs()); in BreakAntiDependencies()
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| H A D | InterferenceCache.cpp | 43 if (PhysRegEntriesCount == TRI->getNumRegs()) return; in reinitPhysRegEntries()
45 PhysRegEntriesCount = TRI->getNumRegs(); in reinitPhysRegEntries()
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| H A D | RegisterUsageInfo.cpp | 95 for (unsigned PReg = 1, PRegE = TRI->getNumRegs(); PReg < PRegE; ++PReg) { in print()
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| H A D | RegUsageInfoPropagate.cpp | 68 ->getNumRegs()) in setRegMask()
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/MC/ |
| H A D | MCRegisterInfo.cpp | 46 assert(SubReg && SubReg < getNumRegs() && "This is not a register"); in getSubRegIndex()
120 report_fatal_error("unknown codeview register " + (RegNum < getNumRegs() in getCodeViewRegNum()
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/AArch64/ |
| H A D | AArch64RegisterInfo.cpp | 162 for (size_t i = 0; i < AArch64::GPR64commonRegClass.getNumRegs(); ++i) { in UpdateCustomCalleeSavedRegs()
273 unsigned RegMaskSize = MachineOperand::getRegMaskSize(getNumRegs()); in UpdateCustomCallPreservedMask()
276 for (size_t i = 0; i < AArch64::GPR64commonRegClass.getNumRegs(); ++i) { in UpdateCustomCallPreservedMask()
319 BitVector Reserved(getNumRegs()); in getReservedRegs()
326 for (size_t i = 0; i < AArch64::GPR32commonRegClass.getNumRegs(); ++i) { in getReservedRegs()
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| H A D | AArch64Subtarget.cpp | 215 ReserveXRegister(AArch64::GPR64commonRegClass.getNumRegs()), in AArch64Subtarget()
216 CustomCallSavedXRegs(AArch64::GPR64commonRegClass.getNumRegs()), in AArch64Subtarget()
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/Mips/ |
| H A D | MipsDelaySlotFiller.cpp | 345 : TRI(TRI), Defs(TRI.getNumRegs(), false), Uses(TRI.getNumRegs(), false) {} in RegDefsUses()
376 BitVector CallerSavedRegs(TRI.getNumRegs(), true); in setCallerSaved()
412 BitVector NewDefs(TRI.getNumRegs()), NewUses(TRI.getNumRegs()); in update()
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| /netbsd-src/external/apache2/llvm/dist/llvm/include/llvm/MC/ |
| H A D | MCRegisterInfo.h | 57 unsigned getNumRegs() const { return RegsSize; } in getNumRegs() function
62 assert(i < getNumRegs() && "Register number out of range!"); in getRegister()
491 unsigned getNumRegs() const { in getNumRegs() function
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/SystemZ/ |
| H A D | SystemZRegisterInfo.cpp | 256 BitVector Reserved(getNumRegs()); in getReservedRegs()
425 BitVector PhysClobbered(getNumRegs()); in shouldCoalesce()
441 if (PhysClobbered.count() > (NewRC->getNumRegs() - DemandedFreeGR128)) in shouldCoalesce()
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/NVPTX/ |
| H A D | NVPTXRegisterInfo.cpp | 108 BitVector Reserved(getNumRegs()); in getReservedRegs()
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/RISCV/ |
| H A D | RISCVRegisterInfo.cpp | 78 BitVector Reserved(getNumRegs()); in getReservedRegs()
81 for (size_t Reg = 0; Reg < getNumRegs(); Reg++) { in getReservedRegs()
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