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/netbsd-src/external/gpl3/binutils.old/dist/include/opcode/
H A Dwasm.h58 WASM_OPCODE (0x2a, "f32.load", i32, f32, load, agnostic)
72 WASM_OPCODE (0x38, "f32.store", f32, void, store, agnostic)
85 WASM_OPCODE (0x43, "f32.const", f32, f32, constant_f32, agnostic)
112 WASM_OPCODE (0x5b, "f32.eq", f32, i32, relational, floating)
113 WASM_OPCODE (0x5c, "f32.ne", f32, i32, relational, floating)
114 WASM_OPCODE (0x5d, "f32.lt", f32, i32, relational, floating)
115 WASM_OPCODE (0x5e, "f32.gt", f32, i32, relational, floating)
116 WASM_OPCODE (0x5f, "f32.le", f32, i32, relational, floating)
117 WASM_OPCODE (0x60, "f32.ge", f32, i32, relational, floating)
166 WASM_OPCODE (0x8b, "f32.abs", f32, f32, unary, floating)
[all …]
/netbsd-src/external/gpl3/binutils/dist/include/opcode/
H A Dwasm.h58 WASM_OPCODE (0x2a, "f32.load", i32, f32, load, agnostic)
72 WASM_OPCODE (0x38, "f32.store", f32, void, store, agnostic)
85 WASM_OPCODE (0x43, "f32.const", f32, f32, constant_f32, agnostic)
112 WASM_OPCODE (0x5b, "f32.eq", f32, i32, relational, floating)
113 WASM_OPCODE (0x5c, "f32.ne", f32, i32, relational, floating)
114 WASM_OPCODE (0x5d, "f32.lt", f32, i32, relational, floating)
115 WASM_OPCODE (0x5e, "f32.gt", f32, i32, relational, floating)
116 WASM_OPCODE (0x5f, "f32.le", f32, i32, relational, floating)
117 WASM_OPCODE (0x60, "f32.ge", f32, i32, relational, floating)
166 WASM_OPCODE (0x8b, "f32.abs", f32, f32, unary, floating)
[all …]
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/WebAssembly/
H A DWebAssemblyInstrFloat.td18 !strconcat("f32.", !strconcat(name, "\t$dst, $src")),
19 !strconcat("f32.", name), f32Inst>;
29 !strconcat("f32.", !strconcat(name, "\t$dst, $lhs, $rhs")),
30 !strconcat("f32.", name), f32Inst>;
39 !strconcat("f32.", !strconcat(name, "\t$dst, $lhs, $rhs")),
40 !strconcat("f32.", name), f32Inst>;
76 def : Pat<(frint f32:$src), (NEAREST_F32 f32:$src)>;
89 def : Pat<(seteq f32:$lhs, f32:$rhs), (EQ_F32 f32:$lhs, f32:$rhs)>;
90 def : Pat<(setne f32:$lhs, f32:$rhs), (NE_F32 f32:$lhs, f32:$rhs)>;
91 def : Pat<(setlt f32:$lhs, f32:$rhs), (LT_F32 f32:$lhs, f32:$rhs)>;
[all …]
/netbsd-src/lib/libc_vfp/
H A Dvfpsf.S60 vadd.f32 s0, s0, s1
67 vsub.f32 s0, s0, s1
75 vsub.f32 s0, s1, s0
83 vmul.f32 s0, s0, s1
90 vdiv.f32 s0, s0, s1
97 vneg.f32 s0, s0
108 vcvt.f32.f64 s0, d0
115 vcvt.s32.f32 s0, s0
122 vcvt.u32.f32 s0, s0
129 vcvt.f32.s32 s0, s0
[all …]
/netbsd-src/tests/usr.bin/xlint/lint1/
H A Dqueries.c65 f32_t f32;
227 f32 = (f32_t)f32; in Q7()
228 f32 = (f32_t)f64; in Q7()
229 f32 = (f64_t)f32; in Q7()
231 f32 = (f64_t)f64; in Q7()
233 f64 = (f32_t)f32; in Q7()
236 f64 = (f64_t)f32; in Q7()
261 c32 = (f32_t)f32; in Q7()
64 f32_t f32; global() variable
[all...]
/netbsd-src/external/apache2/llvm/dist/llvm/include/llvm/Analysis/
H A DVecFuncs.def33 TLI_DEFINE_VECFUNC("llvm.fabs.f32", "vfabsf", FIXED(4))
36 TLI_DEFINE_VECFUNC("llvm.sqrt.f32", "vsqrtf", FIXED(4))
40 TLI_DEFINE_VECFUNC("llvm.exp.f32", "vexpf", FIXED(4))
43 TLI_DEFINE_VECFUNC("llvm.log.f32", "vlogf", FIXED(4))
46 TLI_DEFINE_VECFUNC("llvm.log10.f32", "vlog10f", FIXED(4))
51 TLI_DEFINE_VECFUNC("llvm.sin.f32", "vsinf", FIXED(4))
53 TLI_DEFINE_VECFUNC("llvm.cos.f32", "vcosf", FIXED(4))
74 TLI_DEFINE_VECFUNC("llvm.exp.f32", "_simd_exp_f4", FIXED(4))
90 TLI_DEFINE_VECFUNC("llvm.cos.f32", "_simd_cos_f4", FIXED(4))
95 TLI_DEFINE_VECFUNC("llvm.sin.f32", "_simd_sin_f4", FIXED(4))
[all …]
/netbsd-src/regress/lib/libc/ieeefp/testfloat/
H A Dsystfloat.c72 float32 f32; member
110 return uz.f32; in syst_int32_to_float32()
152 return uz.f32; in syst_int64_to_float32()
188 const union32 uz = { .f32 = a }; in syst_float32_to_int32_round_to_zero()
198 const union32 uz = { .f32 = a }; in syst_float32_to_int64_round_to_zero()
207 const union32 ua = { .f32 = a }; in syst_float32_to_float64()
219 const union32 ua = { .f32 = a }; in syst_float32_to_floatx80()
232 const union32 ua = { .f32 = a }; in syst_float32_to_float128()
243 const union32 ua = { .f32 = a }, ub = { .f32 = b }; in syst_float32_add()
247 return uz.f32; in syst_float32_add()
[all …]
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/AMDGPU/
H A DR600Instructions.td402 SDTypeProfile<1, 8, [SDTCisFP<0>, SDTCisVT<1, f32>, SDTCisVT<2, f32>,
403 SDTCisVT<3, f32>, SDTCisVT<4, f32>, SDTCisVT<5, f32>,
404 SDTCisVT<6, f32>, SDTCisVT<7, f32>, SDTCisVT<8, f32>]>,
697 [(set f32:$dst, (fabs f32:$src0))]
704 [(set f32:$dst, (fneg f32:$src0))]
754 [(set f32:$dst, (selectcc f32:$src0, f32:$src1, FP_ONE, FP_ZERO, COND_OEQ))]
759 [(set f32:$dst, (selectcc f32:$src0, f32:$src1, FP_ONE, FP_ZERO, COND_OGT))]
764 [(set f32:$dst, (selectcc f32:$src0, f32:$src1, FP_ONE, FP_ZERO, COND_OGE))]
769 [(set f32:$dst, (selectcc f32:$src0, f32:$src1, FP_ONE, FP_ZERO, COND_UNE_NE))]
774 [(set i32:$dst, (selectcc f32:$src0, f32:$src1, -1, 0, COND_OEQ))]
[all …]
H A DR600RegisterInfo.td152 def R600_ArrayBase : RegisterClass <"AMDGPU", [f32, i32], 32,
177 def R600_KC0_X : RegisterClass <"AMDGPU", [f32, i32], 32,
180 def R600_KC0_Y : RegisterClass <"AMDGPU", [f32, i32], 32,
183 def R600_KC0_Z : RegisterClass <"AMDGPU", [f32, i32], 32,
186 def R600_KC0_W : RegisterClass <"AMDGPU", [f32, i32], 32,
189 def R600_KC0 : RegisterClass <"AMDGPU", [f32, i32], 32,
193 def R600_KC1_X : RegisterClass <"AMDGPU", [f32, i32], 32,
196 def R600_KC1_Y : RegisterClass <"AMDGPU", [f32, i32], 32,
199 def R600_KC1_Z : RegisterClass <"AMDGPU", [f32, i32], 32,
202 def R600_KC1_W : RegisterClass <"AMDGPU", [f32, i32], 32,
[all …]
H A DSIInstructions.td40 [(set f32:$vdst, (int_amdgcn_interp_p1 f32:$vsrc,
66 [(set f32:$vdst, (int_amdgcn_interp_p2 f32:$src0, f32:$vsrc,
76 [(set f32:$vdst, (int_amdgcn_interp_mov (i32 timm:$vsrc),
769 (int_amdgcn_kill (i1 (setcc f32:$src, InlineImmFP32:$imm, cond:$cond))),
801 //defm : RsqPat<V_RSQ_F32_e32, f32>;
803 def : RsqPat<V_RSQ_F32_e32, f32>;
807 (f32 (fsub (f32 (VOP3Mods f32:$x, i32:$mods)),
808 (f32 (ffloor (f32 (VOP3Mods f32:$x, i32:$mods)))))),
824 (f32 (f16_to_fp i32:$src0)),
829 (f32 (f16_to_fp (and_oneuse i32:$src0, 0x7fff))),
[all …]
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/PowerPC/
H A DPPCInstrVSX.td785 [(set f32:$XT, (PPCany_fctidz f32:$XB))]>;
794 [(set f32:$XT, (PPCany_fctiwz f32:$XB))]>;
803 [(set f32:$XT, (PPCany_fctiduz f32:$XB))]>;
812 [(set f32:$XT, (PPCany_fctiwuz f32:$XB))]>;
1048 [(set f32:$XT, (fpimm0))]>;
1131 [(set f32:$XT, (load ForceXForm:$src))]>;
1154 [(store f32:$XT, ForceXForm:$dst)]>;
1167 [(set f32:$XT, (any_fadd f32:$XA, f32:$XB))]>;
1171 [(set f32:$XT, (any_fmul f32:$XA, f32:$XB))]>;
1177 [(set f32:$XT, (any_fsub f32:$XA, f32:$XB))]>;
[all …]
H A DPPCInstrSPE.td154 [(set f64:$RT, (any_fpextend f32:$RB))]>;
249 [(set f32:$RT, (fabs f32:$RA))]>;
253 [(set f32:$RT, (any_fadd f32:$RA, f32:$RB))]>;
257 [(set f32:$RT, (any_fpround f64:$RB))]>;
264 [(set f32:$RT, (any_sint_to_fp i32:$RB))]>;
271 [(set f32:$RT, (any_uint_to_fp i32:$RB))]>;
291 [(set i32:$RT, (any_fp_to_sint f32:$RB))]>;
302 [(set i32:$RT, (any_fp_to_uint f32:$RB))]>;
306 [(set f32:$RT, (any_fdiv f32:$RA, f32:$RB))]>;
310 [(set f32:$RT, (any_fmul f32:$RA, f32:$RB))]>;
[all …]
/netbsd-src/external/lgpl3/gmp/dist/mpn/ia64/
H A Dmul_1.asm114 ldf8 f32 = [up], 8
125 xma.l f36 = f32, f6, f0
126 xma.hu f40 = f32, f6, f0
147 xma.l f36 = f32, f6, f0
148 xma.hu f40 = f32, f6, f0
151 ldf8 f32 = [up], 8
189 ldf8 f32 = [up], 8
203 xma.l f36 = f32, f6, f0
204 xma.hu f40 = f32, f6, f0
224 xma.l f36 = f32, f6, f0
[all …]
H A Daddmul_1.asm113 ldf8 f32 = [up], 8
128 xma.l f36 = f32, f6, f44
129 xma.hu f40 = f32, f6, f44
151 xma.l f36 = f32, f6, f44
152 xma.hu f40 = f32, f6, f44
154 ldf8 f32 = [up], 8
198 ldf8 f32 = [up], 8
216 xma.l f36 = f32, f6, f44
217 xma.hu f40 = f32, f6, f44
237 xma.l f36 = f32, f6, f44
[all …]
/netbsd-src/sys/compat/netbsd32/
H A Dnetbsd32_execve.c119 struct netbsd32_posix_spawn_file_actions_entry *fae32 = NULL, *f32 = NULL; in netbsd32_posix_spawn_fa_alloc() local
152 f32 = &fae32[i]; in netbsd32_posix_spawn_fa_alloc()
153 fae->fae_action = (unsigned)f32->fae_action; in netbsd32_posix_spawn_fa_alloc()
154 fae->fae_fildes = f32->fae_fildes; in netbsd32_posix_spawn_fa_alloc()
157 f32->fae_data.dup2.newfildes; in netbsd32_posix_spawn_fa_alloc()
158 if (!netbsd32_posix_spawn_fae_path(fae, f32, &pathp, &pathp32) in netbsd32_posix_spawn_fa_alloc()
166 fae->fae_oflag = f32->fae_oflag; in netbsd32_posix_spawn_fa_alloc()
167 fae->fae_mode = f32->fae_mode; in netbsd32_posix_spawn_fa_alloc()
/netbsd-src/common/lib/libc/arch/sparc64/string/
H A Dmemcpy.S793 faligndata %f62, %f0, %f32
810 stda %f32, [%o1] ASI_STORE
811 faligndata %f14, %f16, %f32
829 stda %f32, [%o1] ASI_STORE
830 faligndata %f30, %f48, %f32
847 stda %f32, [%o1] ASI_STORE
887 faligndata %f0, %f2, %f32
904 stda %f32, [%o1] ASI_STORE
906 faligndata %f16, %f18, %f32
924 stda %f32, [%o1] ASI_STORE
[all …]
/netbsd-src/external/apache2/llvm/dist/llvm/include/llvm/CodeGen/
H A DValueTypes.td31 def f32 : ValueType<32, 10>; // 32-bit floating point value
117 def v1f32 : ValueType<32, 87>; // 1 x f32 vector value
118 def v2f32 : ValueType<64, 88>; // 2 x f32 vector value
119 def v3f32 : ValueType<96, 89>; // 3 x f32 vector value
120 def v4f32 : ValueType<128, 90>; // 4 x f32 vector value
121 def v5f32 : ValueType<160, 91>; // 5 x f32 vector value
122 def v8f32 : ValueType<256, 92>; // 8 x f32 vector value
123 def v16f32 : ValueType<512, 93>; // 16 x f32 vector value
124 def v32f32 : ValueType<1024, 94>; // 32 x f32 vector value
125 def v64f32 : ValueType<2048, 95>; // 64 x f32 vector value
[all …]
/netbsd-src/external/apache2/llvm/dist/llvm/docs/
H A DNVPTXUsage.rst427 …target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-…
498 .reg .f32 %f<4>;
511 ld.global.f32 %f1, [%rl3];
512 ld.global.f32 %f2, [%rl5];
513 add.f32 %f3, %f1, %f2;
514 st.global.f32 [%rl7], %f3;
535 …target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-…
541 …target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-…
809 …target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-…
896 .reg .f32 %f<111>;
[all …]
/netbsd-src/external/apache2/llvm/dist/llvm/include/llvm/IR/
H A DIntrinsicsNVVM.td32 // * llvm.nvvm.h2f --> llvm.convert.to.fp16.f32
66 !eq(ft,"c:f32") : !listsplat(llvm_float_ty, 8),
67 !eq(ft,"d:f32") : !listsplat(llvm_float_ty, 8),
198 ["f16"], [], ["f16", "f32"], ["f16", "f32"]>.ret;
201 ["f16"], [], ["f16", "f32"], ["f16", "f32"]>.ret;
220 ["c", "d"], ["f16", "f32", "s32"]>.ret;
276 // mma.m8n8k4 has no C=f32 D=f16 variant.
318 !eq(type,"f32"): llvm_float_ty);
1425 "llvm.nvvm.tex.1d.v4f32.f32">;
1429 "llvm.nvvm.tex.1d.level.v4f32.f32">;
[all …]
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/ARM/
H A DARMInstrVFP.td19 def SDT_VMOVSR : SDTypeProfile<1, 1, [SDTCisVT<0, f32>, SDTCisVT<1, i32>]>;
63 def vfp_f32f16imm : PatLeaf<(f32 fpimm), [{
76 def vfp_f32imm : Operand<f32>,
77 PatLeaf<(f32 fpimm), [{
413 IIC_fpALU32, "vadd", ".f32\t$Sd, $Sn, $Sm",
438 IIC_fpALU32, "vsub", ".f32\t$Sd, $Sn, $Sm",
463 IIC_fpDIV32, "vdiv", ".f32\t$Sd, $Sn, $Sm",
484 IIC_fpMUL32, "vmul", ".f32\t$Sd, $Sn, $Sm",
507 IIC_fpMUL32, "vnmul", ".f32\t$Sd, $Sn, $Sm",
532 NoItinerary, !strconcat("vsel", op, ".f32\t$Sd, $Sn, $Sm"),
[all …]
H A DARMInstrCDE.td548 def : Pat<(f32 (int_arm_cde_vcx1 timm:$coproc, timm:$imm)),
549 (f32 (CDE_VCX1_fpsp p_imm:$coproc, imm_11b:$imm))>;
550 def : Pat<(f32 (int_arm_cde_vcx1a timm:$coproc, (f32 SPR:$acc), timm:$imm)),
551 (f32 (CDE_VCX1A_fpsp p_imm:$coproc, SPR:$acc, imm_11b:$imm))>;
557 def : Pat<(f32 (int_arm_cde_vcx2 timm:$coproc, (f32 SPR:$n), timm:$imm)),
558 (f32 (CDE_VCX2_fpsp p_imm:$coproc, SPR:$n, imm_6b:$imm))>;
559 def : Pat<(f32 (int_arm_cde_vcx2a timm:$coproc, (f32 SPR:$acc), (f32 SPR:$n),
561 (f32 (CDE_VCX2A_fpsp p_imm:$coproc, SPR:$acc, SPR:$n, imm_6b:$imm))>;
568 def : Pat<(f32 (int_arm_cde_vcx3 timm:$coproc, (f32 SPR:$n), (f32 SPR:$m),
570 (f32 (CDE_VCX3_fpsp p_imm:$coproc, (f32 SPR:$n), (f32 SPR:$m),
[all …]
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/Mips/
H A DMipsCallingConv.td86 CCIfType<[i32, f32], CCAssignToStack<4, 4>>,
104 // f32 are returned in registers F0, F2
105 CCIfType<[f32], CCAssignToReg<[F0, F2]>>,
151 // f32 arguments are passed in single precision FP registers.
152 CCIfType<[f32], CCAssignToRegWithShadow<[F12, F13, F14, F15,
164 CCIfType<[f32], CCAssignToStack<4, 8>>,
178 CCIfType<[f32], CCAssignToReg<[A0, A1, A2, A3, T0, T1, T2, T3]>>,
184 CCIfType<[f32], CCAssignToStack<4, 8>>,
189 // f128 needs to be handled similarly to f32 and f64. However, f128 is not
213 // f32 are returned in registers F0, F2
[all …]
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/NVPTX/
H A DNVPTXIntrinsics.td141 !eq(reg, "f32"): Float32Regs);
178 foreach regclass = ["i32", "f32"] in {
586 def INT_NVVM_FMIN_F : F_MATH_2<"min.f32 \t$dst, $src0, $src1;", Float32Regs,
588 def INT_NVVM_FMIN_FTZ_F : F_MATH_2<"min.ftz.f32 \t$dst, $src0, $src1;",
591 def INT_NVVM_FMAX_F : F_MATH_2<"max.f32 \t$dst, $src0, $src1;", Float32Regs,
593 def INT_NVVM_FMAX_FTZ_F : F_MATH_2<"max.ftz.f32 \t$dst, $src0, $src1;",
616 def INT_NVVM_MUL_RN_FTZ_F : F_MATH_2<"mul.rn.ftz.f32 \t$dst, $src0, $src1;",
618 def INT_NVVM_MUL_RN_F : F_MATH_2<"mul.rn.f32 \t$dst, $src0, $src1;",
620 def INT_NVVM_MUL_RZ_FTZ_F : F_MATH_2<"mul.rz.ftz.f32 \t$dst, $src0, $src1;",
622 def INT_NVVM_MUL_RZ_F : F_MATH_2<"mul.rz.f32 \t$dst, $src0, $src1;",
[all …]
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/VE/
H A DVEInstrInfo.td1015 defm LDU : LOADm<"ldu", 0x02, F32, f32, load>;
1073 defm STU : STOREm<"stu", 0x12, F32, f32, store>;
1100 defm DLDU : LOADm<"dldu", 0x0a, F32, f32, load>;
1303 let cw = 1, cw2 = 1 in defm CMOVS : RRCMOVm<"cmov.s.${cfw}", 0x3B, F32, f32>;
1359 defm FADDS : RRFm<"fadd.s", 0x4C, F32, f32, fadd, simm7fp, mimmfp32>;
1364 defm FSUBS : RRFm<"fsub.s", 0x5C, F32, f32, fsub, simm7fp, mimmfp32>;
1369 defm FMULS : RRFm<"fmul.s", 0x4D, F32, f32, fmul, simm7fp, mimmfp32>;
1374 defm FDIVS : RRFm<"fdiv.s", 0x5D, F32, f32, fdiv, simm7fp, mimmfp32>;
1379 defm FCMPS : RRFm<"fcmp.s", 0x7E, F32, f32, null_frag, simm7fp, mimmfp32>;
1386 defm FMAXS : RRFm<"fmax.s", 0x3E, F32, f32, fmaxnum, simm7fp, mimmfp32>;
[all …]
/netbsd-src/external/gpl3/gcc/dist/gcc/config/arm/
H A Dvfp.md50 return "vmov%?.f32\t%0, %1\t%@ int";
106 return "vmov%?.f32\t%0, %1\t%@ int";
155 return "vmov%?.f32\t%0, %1\t%@ int";
210 return "vmov%?.f32\t%0, %1\t%@ int";
259 return \"vmov%?.f32\\t%0, %1\\t%@ int\";
311 return \"vmov%?.f32\\t%0, %1\\t%@ int\";
371 return \"vmov%?.f32\\t%0, %1\\t%@ int\;vmov%?.f32\\t%p0, %p1\\t%@ int\";
505 return \"vmov.f32\\t%0, %1\";
558 return \"vmov.f32\\t%0, %1\";
611 return \"vmov%?.f32\\t%0, %1\";
[all …]

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