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Searched refs:dpll (Results 1 – 25 of 25) sorted by relevance

/netbsd-src/sys/external/bsd/drm2/dist/drm/i915/display/
H A Dintel_display.c580 static int pnv_calc_dpll_params(int refclk, struct dpll *clock) in pnv_calc_dpll_params()
592 static u32 i9xx_dpll_compute_m(struct dpll *dpll) in i9xx_dpll_compute_m() argument
594 return 5 * (dpll->m1 + 2) + (dpll->m2 + 2); in i9xx_dpll_compute_m()
597 static int i9xx_calc_dpll_params(int refclk, struct dpll *clock) in i9xx_calc_dpll_params()
609 static int vlv_calc_dpll_params(int refclk, struct dpll *clock) in vlv_calc_dpll_params()
621 int chv_calc_dpll_params(int refclk, struct dpll *clock) in chv_calc_dpll_params()
642 const struct dpll *clock) in intel_PLL_is_valid()
715 int target, int refclk, struct dpll *match_clock, in i9xx_find_best_dpll()
716 struct dpll *best_clock) in i9xx_find_best_dpll()
719 struct dpll clock; in i9xx_find_best_dpll()
[all …]
H A Dintel_dvo.c452 u32 dpll[I915_MAX_PIPES]; in intel_dvo_init() local
489 dpll[pipe] = I915_READ(DPLL(pipe)); in intel_dvo_init()
490 I915_WRITE(DPLL(pipe), dpll[pipe] | DPLL_DVO_2X_MODE); in intel_dvo_init()
497 I915_WRITE(DPLL(pipe), dpll[pipe]); in intel_dvo_init()
H A Dintel_display.h54 struct dpll;
575 const struct dpll *dpll);
588 struct dpll *best_clock);
589 int chv_calc_dpll_params(int refclk, struct dpll *pll_clock);
H A Dintel_display_types.h447 struct dpll { struct
900 struct dpll dpll; member
H A Dintel_dpll_mgr.h172 u32 dpll; member
H A Dintel_dpll_mgr.c389 hw_state->dpll = val; in ibx_pch_dpll_get_hw_state()
428 I915_WRITE(PCH_DPLL(id), pll->state.hw_state.dpll); in ibx_pch_dpll_enable()
439 I915_WRITE(PCH_DPLL(id), pll->state.hw_state.dpll); in ibx_pch_dpll_enable()
496 hw_state->dpll, in ibx_dump_hw_state()
1762 struct dpll best_clock; in bxt_ddi_hdmi_pll_dividers()
3908 hw_state->dpll, in intel_dpll_dump_hw_state()
H A Dintel_dp.c92 struct dpll dpll; member
802 &chv_dpll[0].dpll : &vlv_dpll[0].dpll)) { in vlv_power_sequencer_kick()
1816 pipe_config->dpll = divisor[i].dpll; in intel_dp_set_clock()
H A Dintel_sdvo.c1250 struct dpll *clock = &pipe_config->dpll; in i9xx_adjust_sdvo_tv_clock()
H A Dintel_ddi.c1722 struct dpll clock; in bxt_calc_pll_link()
/netbsd-src/sys/external/gpl2/dts/dist/arch/arm/boot/dts/
H A Domap54xx-clocks.dtsi104 compatible = "ti,omap4-dpll-m4xen-clock";
111 compatible = "ti,omap4-dpll-x2-clock";
177 compatible = "ti,omap4-dpll-core-clock";
184 compatible = "ti,omap4-dpll-x2-clock";
312 compatible = "ti,omap4-dpll-clock";
321 compatible = "ti,omap4-dpll-x2-clock";
357 compatible = "ti,omap5-mpu-dpll-clock";
521 compatible = "ti,omap4-dpll-clock";
528 compatible = "ti,omap4-dpll-x2-clock";
588 compatible = "ti,omap4-dpll-clock";
[all …]
H A Ddra7xx-clocks.dtsi198 compatible = "ti,omap4-dpll-m4xen-clock";
205 compatible = "ti,omap4-dpll-x2-clock";
261 compatible = "ti,omap4-dpll-core-clock";
268 compatible = "ti,omap4-dpll-x2-clock";
293 compatible = "ti,omap5-mpu-dpll-clock";
335 compatible = "ti,omap4-dpll-clock";
373 compatible = "ti,omap4-dpll-clock";
411 compatible = "ti,omap4-dpll-clock";
460 compatible = "ti,omap4-dpll-clock";
486 compatible = "ti,omap4-dpll-clock";
[all …]
H A Dam43xx-clocks.dtsi205 compatible = "ti,am3-dpll-core-clock";
212 compatible = "ti,am3-dpll-x2-clock";
251 compatible = "ti,am3-dpll-clock";
277 compatible = "ti,am3-dpll-clock";
295 compatible = "ti,am3-dpll-clock";
314 compatible = "ti,am3-dpll-j-type-clock";
558 compatible = "ti,am3-dpll-clock";
627 compatible = "ti,am3-dpll-x2-clock";
H A Dam33xx-clocks.dtsi165 compatible = "ti,am3-dpll-core-clock";
172 compatible = "ti,am3-dpll-x2-clock";
205 compatible = "ti,am3-dpll-clock";
221 compatible = "ti,am3-dpll-no-gate-clock";
245 compatible = "ti,am3-dpll-no-gate-clock";
262 compatible = "ti,am3-dpll-no-gate-j-type-clock";
H A Domap44xx-clocks.dtsi134 compatible = "ti,omap4-dpll-m4xen-clock";
141 compatible = "ti,omap4-dpll-x2-clock";
196 compatible = "ti,omap4-dpll-core-clock";
203 compatible = "ti,omap4-dpll-x2-clock";
346 compatible = "ti,omap4-dpll-clock";
355 compatible = "ti,omap4-dpll-x2-clock";
387 compatible = "ti,omap4-dpll-clock";
566 compatible = "ti,omap4-dpll-clock";
582 compatible = "ti,omap4-dpll-x2-clock";
667 compatible = "ti,omap4-dpll-j-type-clock";
H A Domap36xx-clocks.dtsi10 compatible = "ti,omap3-dpll-per-j-type-clock";
H A Dimx6q-dms-ba16.dts117 fsl,receive-dpll-mode = <1>;
H A Domap36xx-am35xx-omap3430es2plus-clocks.dtsi27 compatible = "ti,omap3-dpll-clock";
H A Domap34xx-omap36xx-clocks.dtsi165 compatible = "ti,omap3-dpll-clock";
H A Domap3xxx-clocks.dtsi195 compatible = "ti,omap3-dpll-per-clock";
236 compatible = "ti,omap3-dpll-core-clock";
318 compatible = "ti,omap3-dpll-clock";
H A Domap24xx-clocks.dtsi123 compatible = "ti,omap2-dpll-core-clock";
/netbsd-src/sys/external/gpl2/dts/dist/arch/arm64/boot/dts/sprd/
H A Dsharkl3.dtsi123 dpll: dpll { label
124 compatible = "sprd,sc9863a-dpll";
/netbsd-src/sys/external/gpl2/dts/dist/arch/arm64/boot/dts/microchip/
H A Dsparx5.dtsi84 compatible = "microchip,sparx5-dpll";
/netbsd-src/sys/external/gpl2/dts/dist/arch/arm64/boot/dts/renesas/
H A Dsalvator-common.dtsi524 reg-names = "main", "dpll", "cp", "hdmi", "edid", "repeater",
/netbsd-src/sys/external/bsd/drm2/dist/drm/i915/
H A Di915_drv.h266 struct dpll;
H A Di915_debugfs.c2756 seq_printf(m, " dpll: 0x%08x\n", pll->state.hw_state.dpll); in i915_shared_dplls_info()