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Searched refs:dm_write_reg (Results 1 – 25 of 27) sorted by relevance

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/netbsd-src/sys/external/bsd/drm2/dist/drm/amd/display/dc/dce110/
H A Damdgpu_dce110_opp_regamma_v.c75 dm_write_reg(xfm->ctx, mmDCFEV_MEM_PWR_CTRL, value); in power_on_lut()
104 dm_write_reg(xfm_dce->base.ctx, in set_bypass_input_gamma()
118 dm_write_reg(xfm_dce->base.ctx, mmGAMMA_CORR_CONTROL, 0); in configure_regamma_mode()
156 dm_write_reg(xfm_dce->base.ctx, mmGAMMA_CORR_CNTLA_START_CNTL, in regamma_config_regions_and_segments()
167 dm_write_reg(xfm_dce->base.ctx, in regamma_config_regions_and_segments()
178 dm_write_reg(xfm_dce->base.ctx, in regamma_config_regions_and_segments()
195 dm_write_reg(xfm_dce->base.ctx, in regamma_config_regions_and_segments()
227 dm_write_reg( in regamma_config_regions_and_segments()
260 dm_write_reg(xfm_dce->base.ctx, in regamma_config_regions_and_segments()
292 dm_write_reg(xfm_dce->base.ctx, in regamma_config_regions_and_segments()
[all …]
H A Damdgpu_dce110_mem_input_v.c58 dm_write_reg( in set_flip_control()
79 dm_write_reg( in program_pri_addr_c()
93 dm_write_reg( in program_pri_addr_c()
115 dm_write_reg( in program_pri_addr_l()
129 dm_write_reg( in program_pri_addr_l()
165 dm_write_reg(mem_input110->base.ctx, in enable()
207 dm_write_reg( in program_tiling()
229 dm_write_reg( in program_tiling()
260 dm_write_reg( in program_size_and_rotation()
268 dm_write_reg( in program_size_and_rotation()
[all …]
H A Damdgpu_dce110_opp_csc_v.c147 dm_write_reg(ctx, addr, value); in program_color_matrix_v()
165 dm_write_reg(ctx, addr, value); in program_color_matrix_v()
183 dm_write_reg(ctx, addr, value); in program_color_matrix_v()
201 dm_write_reg(ctx, addr, value); in program_color_matrix_v()
219 dm_write_reg(ctx, addr, value); in program_color_matrix_v()
237 dm_write_reg(ctx, addr, value); in program_color_matrix_v()
261 dm_write_reg(ctx, addr, value); in program_color_matrix_v()
279 dm_write_reg(ctx, addr, value); in program_color_matrix_v()
297 dm_write_reg(ctx, addr, value); in program_color_matrix_v()
315 dm_write_reg(ctx, addr, value); in program_color_matrix_v()
[all …]
H A Damdgpu_dce110_timing_generator.c121 dm_write_reg(tg->ctx, address, regval); in dce110_timing_generator_set_early_control()
145 dm_write_reg(tg->ctx, CRTC_REG(mmCRTC_MASTER_UPDATE_MODE), value); in dce110_timing_generator_enable_crtc()
149 dm_write_reg(tg->ctx, CRTC_REG(mmCRTC_MASTER_UPDATE_LOCK), value); in dce110_timing_generator_enable_crtc()
180 dm_write_reg(tg->ctx, addr, value); in dce110_timing_generator_program_blank_color()
227 dm_write_reg(tg->ctx, addr, value);
230 dm_write_reg(tg->ctx, addr, value);
277 dm_write_reg(tg->ctx, in program_horz_count_by_2()
466 dm_write_reg(tg->ctx, addr, v_total_min); in dce110_timing_generator_set_drr()
469 dm_write_reg(tg->ctx, addr, v_total_max); in dce110_timing_generator_set_drr()
472 dm_write_reg(tg->ctx, addr, v_total_cntl); in dce110_timing_generator_set_drr()
[all …]
H A Damdgpu_dce110_timing_generator_v.c70 dm_write_reg(tg->ctx, in dce110_timing_generator_v_enable_crtc()
75 dm_write_reg(tg->ctx, mmCRTCV_MASTER_UPDATE_MODE, value); in dce110_timing_generator_v_enable_crtc()
80 dm_write_reg(tg->ctx, in dce110_timing_generator_v_enable_crtc()
96 dm_write_reg(tg->ctx, in dce110_timing_generator_v_disable_crtc()
122 dm_write_reg(tg->ctx, addr, value); in dce110_timing_generator_v_blank_crtc()
142 dm_write_reg(tg->ctx, addr, value); in dce110_timing_generator_v_unblank_crtc()
271 dm_write_reg(ctx, addr, value); in dce110_timing_generator_v_program_blanking()
280 dm_write_reg(ctx, addr, value); in dce110_timing_generator_v_program_blanking()
303 dm_write_reg(ctx, addr, value); in dce110_timing_generator_v_program_blanking()
325 dm_write_reg(ctx, addr, value); in dce110_timing_generator_v_program_blanking()
[all …]
H A Damdgpu_dce110_compressor.c97 dm_write_reg(compressor->ctx, DCP_REG(mmLB_SYNC_RESET_SEL), value); in reset_lb_on_vblank()
114 dm_write_reg(compressor->ctx, DCP_REG(mmLB_SYNC_RESET_SEL), value); in reset_lb_on_vblank()
165 dm_write_reg(compressor->ctx, addr, value); in dce110_compressor_power_up_fbc()
172 dm_write_reg(compressor->ctx, addr, value); in dce110_compressor_power_up_fbc()
177 dm_write_reg(compressor->ctx, addr, value); in dce110_compressor_power_up_fbc()
183 dm_write_reg(compressor->ctx, addr, value); in dce110_compressor_power_up_fbc()
187 dm_write_reg(compressor->ctx, mmFBC_IND_LUT0, value); in dce110_compressor_power_up_fbc()
190 dm_write_reg(compressor->ctx, mmFBC_IND_LUT1, value); in dce110_compressor_power_up_fbc()
213 dm_write_reg(compressor->ctx, addr, value); in dce110_compressor_enable_fbc()
224 dm_write_reg(compressor->ctx, addr, value); in dce110_compressor_enable_fbc()
[all …]
H A Damdgpu_dce110_transform_v.c106 dm_write_reg(ctx, addr, value); in program_viewport()
120 dm_write_reg(ctx, addr, value); in program_viewport()
136 dm_write_reg(ctx, addr, value); in program_viewport()
150 dm_write_reg(ctx, addr, value); in program_viewport()
180 dm_write_reg(ctx, mmSCLV_TAP_CONTROL, value); in setup_scaling_configuration()
211 dm_write_reg(ctx, mmSCLV_MODE, value); in setup_scaling_configuration()
220 dm_write_reg(ctx, mmSCLV_CONTROL, value); in setup_scaling_configuration()
271 dm_write_reg(xfm_dce->base.ctx, in program_overscan()
275 dm_write_reg(xfm_dce->base.ctx, in program_overscan()
287 dm_write_reg(xfm_dce->base.ctx, mmSCLV_UPDATE, value); in set_coeff_update_complete()
[all …]
H A Damdgpu_dce110_hw_sequencer.c152 dm_write_reg(ctx, addr, value); in dce110_init_pte()
187 dm_write_reg(ctx, addr, value); in dce110_init_pte()
236 dm_write_reg(ctx, in dce110_enable_display_power_gating()
/netbsd-src/sys/external/bsd/drm2/dist/drm/amd/display/dc/dce112/
H A Damdgpu_dce112_compressor.c342 dm_write_reg(compressor->ctx, addr, value); in dce112_compressor_power_up_fbc()
349 dm_write_reg(compressor->ctx, addr, value); in dce112_compressor_power_up_fbc()
354 dm_write_reg(compressor->ctx, addr, value); in dce112_compressor_power_up_fbc()
360 dm_write_reg(compressor->ctx, addr, value); in dce112_compressor_power_up_fbc()
364 dm_write_reg(compressor->ctx, mmFBC_IND_LUT0, value); in dce112_compressor_power_up_fbc()
367 dm_write_reg(compressor->ctx, mmFBC_IND_LUT1, value); in dce112_compressor_power_up_fbc()
405 dm_write_reg(compressor->ctx, addr, value); in dce112_compressor_enable_fbc()
414 dm_write_reg(compressor->ctx, addr, value); in dce112_compressor_enable_fbc()
416 dm_write_reg(compressor->ctx, addr, value); in dce112_compressor_enable_fbc()
432 dm_write_reg(compressor->ctx, mmFBC_CNTL, reg_data); in dce112_compressor_disable_fbc()
[all …]
H A Damdgpu_dce112_hw_sequencer.c114 dm_write_reg(ctx, addr, value); in dce112_init_pte()
146 dm_write_reg(ctx, in dce112_enable_display_power_gating()
/netbsd-src/sys/external/bsd/drm2/dist/drm/amd/display/dc/dce/
H A Damdgpu_dce_dmcu.c251 dm_write_reg(dmcu->ctx, REG(MASTER_COMM_DATA_REG1), in dce_dmcu_setup_psr()
263 dm_write_reg(dmcu->ctx, REG(MASTER_COMM_DATA_REG2), in dce_dmcu_setup_psr()
268 dm_write_reg(dmcu->ctx, REG(MASTER_COMM_DATA_REG3), in dce_dmcu_setup_psr()
316 dm_write_reg(dmcu->ctx, REG(MASTER_COMM_DATA_REG1), masterCmdData1.u32); in dce_psr_wait_loop()
674 dm_write_reg(dmcu->ctx, REG(MASTER_COMM_DATA_REG1), in dcn10_dmcu_setup_psr()
686 dm_write_reg(dmcu->ctx, REG(MASTER_COMM_DATA_REG2), in dcn10_dmcu_setup_psr()
691 dm_write_reg(dmcu->ctx, REG(MASTER_COMM_DATA_REG3), in dcn10_dmcu_setup_psr()
726 dm_write_reg(dmcu->ctx, REG(MASTER_COMM_DATA_REG1), masterCmdData1.u32); in dcn10_psr_wait_loop()
H A Damdgpu_dce_link_encoder.c507 dm_write_reg(ctx, addr, value); in aux_initialize()
515 dm_write_reg(ctx, addr, value); in aux_initialize()
/netbsd-src/sys/external/bsd/drm2/dist/drm/amd/display/dc/irq/
H A Damdgpu_irq_service.c104 dm_write_reg(irq_service->ctx, addr, value); in dal_irq_service_set_generic()
141 dm_write_reg(irq_service->ctx, addr, value); in dal_irq_service_ack_generic()
/netbsd-src/sys/external/bsd/drm2/dist/drm/amd/display/dc/dce120/
H A Damdgpu_dce120_hw_sequencer.c150 dm_write_reg(ctx, addr, value);
185 dm_write_reg(ctx, in dce120_enable_display_power_gating()
/netbsd-src/sys/external/bsd/drm2/dist/drm/amd/display/dc/dce80/
H A Damdgpu_dce80_timing_generator.c110 dm_write_reg(tg->ctx, addr, value); in program_pix_dur()
187 dm_write_reg(tg->ctx, addr, value); in dce80_timing_generator_enable_advanced_request()
/netbsd-src/sys/external/bsd/drm2/dist/drm/amd/display/dc/
H A Damdgpu_dc_helper.c272 dm_write_reg(ctx, addr, reg_val); in generic_reg_update_ex()
301 dm_write_reg(ctx, addr, reg_val); in generic_reg_set_ex()
539 dm_write_reg(ctx, addr_index, index); in generic_write_indirect_reg()
540 dm_write_reg(ctx, addr_data, data); in generic_write_indirect_reg()
555 dm_write_reg(ctx, addr_index, index); in generic_read_indirect_reg()
H A Ddm_services.h72 #define dm_write_reg(ctx, address, value) \ macro
/netbsd-src/sys/external/bsd/drm2/dist/drm/amd/display/dc/dce100/
H A Damdgpu_dce100_hw_sequencer.c102 dm_write_reg(ctx, in dce100_enable_display_power_gating()
/netbsd-src/sys/external/bsd/drm2/dist/drm/amd/display/dc/irq/dce80/
H A Damdgpu_irq_service_dce80.c69 dm_write_reg(irq_service->ctx, info->enable_reg, value); in hpd_ack()
/netbsd-src/sys/external/bsd/drm2/dist/drm/amd/display/dc/irq/dce120/
H A Damdgpu_irq_service_dce120.c69 dm_write_reg(irq_service->ctx, info->enable_reg, value); in hpd_ack()
/netbsd-src/sys/external/bsd/drm2/dist/drm/amd/display/dc/irq/dcn20/
H A Damdgpu_irq_service_dcn20.c150 dm_write_reg(irq_service->ctx, info->enable_reg, value); in hpd_ack()
/netbsd-src/sys/external/bsd/drm2/dist/drm/amd/display/dc/irq/dcn10/
H A Damdgpu_irq_service_dcn10.c150 dm_write_reg(irq_service->ctx, info->enable_reg, value); in hpd_ack()
/netbsd-src/sys/external/bsd/drm2/dist/drm/amd/display/dc/irq/dcn21/
H A Damdgpu_irq_service_dcn21.c151 dm_write_reg(irq_service->ctx, info->enable_reg, value); in hpd_ack()
/netbsd-src/sys/external/bsd/drm2/dist/drm/amd/display/dc/irq/dce110/
H A Damdgpu_irq_service_dce110.c66 dm_write_reg(irq_service->ctx, info->enable_reg, value); in hpd_ack()
/netbsd-src/sys/external/bsd/drm2/dist/drm/amd/display/dc/dcn20/
H A Damdgpu_dcn20_link_encoder.c275 dm_write_reg(CTX, AUX_REG(reg_name), val)

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